From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C1ECA0C43; Tue, 20 Jul 2021 05:52:23 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 101D140F35; Tue, 20 Jul 2021 05:52:16 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id 7294440E0F for ; Tue, 20 Jul 2021 05:52:14 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ECCB31FB; Mon, 19 Jul 2021 20:52:13 -0700 (PDT) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.222]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 94CCC3F694; Mon, 19 Jul 2021 20:52:10 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, david.marchand@redhat.com, roretzla@linux.microsoft.com, stephen@networkplumber.org, olivier.matz@6wind.com, andrew.rybchenko@oktetlabs.ru, harry.van.haaren@intel.com, honnappa.nagarahalli@arm.com, ruifeng.wang@arm.com Cc: dev@dpdk.org, nd@arm.com Date: Mon, 19 Jul 2021 22:51:21 -0500 Message-Id: <20210720035125.14214-5-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210720035125.14214-1-joyce.kong@arm.com> References: <20210616025459.22717-1-joyce.kong@arm.com> <20210720035125.14214-1-joyce.kong@arm.com> Subject: [dpdk-dev] [PATCH v3 4/8] test/mcslock: use compiler atomics for lcores sync X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Convert rte_atomic usages to compiler atomic built-ins for lcores sync in mcslock testcases. Signed-off-by: Joyce Kong Reviewed-by: Ruifeng Wang Acked-by: Stephen Hemminger --- app/test/test_mcslock.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/app/test/test_mcslock.c b/app/test/test_mcslock.c index 80eaecc90a..52e45e7e2a 100644 --- a/app/test/test_mcslock.c +++ b/app/test/test_mcslock.c @@ -17,7 +17,6 @@ #include #include #include -#include #include "test.h" @@ -43,7 +42,7 @@ rte_mcslock_t *p_ml_perf; static unsigned int count; -static rte_atomic32_t synchro; +static uint32_t synchro; static int test_mcslock_per_core(__rte_unused void *arg) @@ -76,8 +75,7 @@ load_loop_fn(void *func_param) rte_mcslock_t ml_perf_me; /* wait synchro */ - while (rte_atomic32_read(&synchro) == 0) - ; + rte_wait_until_equal_32(&synchro, 1, __ATOMIC_RELAXED); begin = rte_get_timer_cycles(); while (lcount < MAX_LOOP) { @@ -102,15 +100,15 @@ test_mcslock_perf(void) const unsigned int lcore = rte_lcore_id(); printf("\nTest with no lock on single core...\n"); - rte_atomic32_set(&synchro, 1); + __atomic_store_n(&synchro, 1, __ATOMIC_RELAXED); load_loop_fn(&lock); printf("Core [%u] Cost Time = %"PRIu64" us\n", lcore, time_count[lcore]); memset(time_count, 0, sizeof(time_count)); printf("\nTest with lock on single core...\n"); + __atomic_store_n(&synchro, 1, __ATOMIC_RELAXED); lock = 1; - rte_atomic32_set(&synchro, 1); load_loop_fn(&lock); printf("Core [%u] Cost Time = %"PRIu64" us\n", lcore, time_count[lcore]); @@ -118,11 +116,11 @@ test_mcslock_perf(void) printf("\nTest with lock on %u cores...\n", (rte_lcore_count())); - rte_atomic32_set(&synchro, 0); + __atomic_store_n(&synchro, 0, __ATOMIC_RELAXED); rte_eal_mp_remote_launch(load_loop_fn, &lock, SKIP_MAIN); /* start synchro and launch test on main */ - rte_atomic32_set(&synchro, 1); + __atomic_store_n(&synchro, 1, __ATOMIC_RELAXED); load_loop_fn(&lock); rte_eal_mp_wait_lcore(); -- 2.17.1