From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: junfeng.guo@intel.com, dev@dpdk.org,
Qi Zhang <qi.z.zhang@intel.com>, Wenjun Wu <wenjun1.wu@intel.com>
Subject: [dpdk-dev] [PATCH 17/28] net/ice/base: support FDIR for GRE tunnel packet
Date: Tue, 10 Aug 2021 10:51:29 +0800 [thread overview]
Message-ID: <20210810025140.1698163-18-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20210810025140.1698163-1-qi.z.zhang@intel.com>
Support IPV4_GRE and IPV6_GRE with inner IPV4/IPV6/UDP/TCP for
FDIR.
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_fdir.c | 361 ++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 2 +
drivers/net/ice/base/ice_type.h | 14 ++
3 files changed, 377 insertions(+)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 2e4770061d..e5ad0f298b 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -537,6 +537,183 @@ static const u8 ice_fdir_ipv4_frag_pkt[] = {
0x00, 0x00
};
+/* IPV4 GRE INNER IPV4 */
+static const u8 ice_fdir_ipv4_gre4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x2e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x2f,
+ 0x7c, 0x9e, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x16, 0x00, 0x01, 0x00, 0x00, 0x40, 0x00,
+ 0x7c, 0xe5, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp4_gre4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x36, 0x00, 0x01, 0x00, 0x00, 0x40, 0x2f,
+ 0x7c, 0x96, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x1e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0xcc, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0x01, 0xd8, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp4_gre4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x42, 0x00, 0x01, 0x00, 0x00, 0x40, 0x2f,
+ 0x7c, 0x8a, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x2a, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+ 0x7c, 0xcb, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
+ 0x20, 0x00, 0x91, 0xde, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV4 GRE INNER IPV6 */
+static const u8 ice_fdir_ipv6_gre4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x42, 0x00, 0x01, 0x00, 0x00, 0x40, 0x2f,
+ 0x7c, 0x8a, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x3b, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp6_gre4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x4a, 0x00, 0x01, 0x00, 0x00, 0x40, 0x2f,
+ 0x7c, 0x82, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x0a, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x0a, 0xff, 0xd8, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp6_gre4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x56, 0x00, 0x01, 0x00, 0x00, 0x40, 0x2f,
+ 0x7c, 0x76, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x16, 0x06, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x02, 0x20, 0x00, 0x8f, 0xdf,
+ 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV6 GRE INNER IPV4 */
+static const u8 ice_fdir_ipv4_gre6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x18, 0x2F, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x08, 0x00, 0x45, 0x00, 0x00, 0x14, 0x00, 0x01,
+ 0x00, 0x00, 0x40, 0x00, 0x7A, 0xEA, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp4_gre6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x20, 0x2F, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x08, 0x00, 0x45, 0x00, 0x00, 0x1C, 0x00, 0x01,
+ 0x00, 0x00, 0x40, 0x11, 0x7A, 0xD1, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0xFF, 0xDE, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp4_gre6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x2C, 0x2F, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x08, 0x00, 0x45, 0x00, 0x00, 0x28, 0x00, 0x01,
+ 0x00, 0x00, 0x40, 0x06, 0x7A, 0xD0, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x50, 0x02, 0x20, 0x00, 0x8F, 0xE3,
+ 0x00, 0x00, 0x00, 0x00,
+};
+
+/* IPV6 GRE INNER IPV6 */
+static const u8 ice_fdir_ipv6_gre6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x2C, 0x2F, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x86, 0xDD, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x3B, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp6_gre6_pkt[] = {
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x34, 0x2F, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x86, 0xDD, 0x60, 0x00, 0x00, 0x00, 0x00, 0x08,
+ 0x11, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x35, 0x00, 0x35, 0x00, 0x08,
+ 0xFF, 0x72, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp6_gre6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x40, 0x2F, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x86, 0xDD, 0x60, 0x00, 0x00, 0x00, 0x00, 0x14,
+ 0x06, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
+ 0x20, 0x00, 0x8F, 0xE1, 0x00, 0x00, 0x00, 0x00,
+};
+
static const u8 ice_fdir_tcpv6_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
@@ -1055,6 +1232,94 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_ipv4_udp_ecpri_tp0_pkt),
ice_fdir_ipv4_udp_ecpri_tp0_pkt,
},
+ /* IPV4 GRE INNER IPV4 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4,
+ sizeof(ice_fdir_ipv4_gre4_pkt),
+ ice_fdir_ipv4_gre4_pkt,
+ sizeof(ice_fdir_ipv4_gre4_pkt),
+ ice_fdir_ipv4_gre4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_UDP,
+ sizeof(ice_fdir_udp4_gre4_pkt),
+ ice_fdir_udp4_gre4_pkt,
+ sizeof(ice_fdir_udp4_gre4_pkt),
+ ice_fdir_udp4_gre4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_TCP,
+ sizeof(ice_fdir_tcp4_gre4_pkt),
+ ice_fdir_tcp4_gre4_pkt,
+ sizeof(ice_fdir_tcp4_gre4_pkt),
+ ice_fdir_tcp4_gre4_pkt,
+ },
+ /* IPV4 GRE INNER IPV6 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6,
+ sizeof(ice_fdir_ipv6_gre4_pkt),
+ ice_fdir_ipv6_gre4_pkt,
+ sizeof(ice_fdir_ipv6_gre4_pkt),
+ ice_fdir_ipv6_gre4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_UDP,
+ sizeof(ice_fdir_udp6_gre4_pkt),
+ ice_fdir_udp6_gre4_pkt,
+ sizeof(ice_fdir_udp6_gre4_pkt),
+ ice_fdir_udp6_gre4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_gre4_pkt),
+ ice_fdir_tcp6_gre4_pkt,
+ sizeof(ice_fdir_tcp6_gre4_pkt),
+ ice_fdir_tcp6_gre4_pkt,
+ },
+ /* IPV6 GRE INNER IPV4 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4,
+ sizeof(ice_fdir_ipv4_gre6_pkt),
+ ice_fdir_ipv4_gre6_pkt,
+ sizeof(ice_fdir_ipv4_gre6_pkt),
+ ice_fdir_ipv4_gre6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_UDP,
+ sizeof(ice_fdir_udp4_gre6_pkt),
+ ice_fdir_udp4_gre6_pkt,
+ sizeof(ice_fdir_udp4_gre6_pkt),
+ ice_fdir_udp4_gre6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_TCP,
+ sizeof(ice_fdir_tcp4_gre6_pkt),
+ ice_fdir_tcp4_gre6_pkt,
+ sizeof(ice_fdir_tcp4_gre6_pkt),
+ ice_fdir_tcp4_gre6_pkt,
+ },
+ /* IPV4 GRE INNER IPV6 */
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6,
+ sizeof(ice_fdir_ipv6_gre6_pkt),
+ ice_fdir_ipv6_gre6_pkt,
+ sizeof(ice_fdir_ipv6_gre6_pkt),
+ ice_fdir_ipv6_gre6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_UDP,
+ sizeof(ice_fdir_udp6_gre6_pkt),
+ ice_fdir_udp6_gre6_pkt,
+ sizeof(ice_fdir_udp6_gre6_pkt),
+ ice_fdir_udp6_gre6_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_gre6_pkt),
+ ice_fdir_tcp6_gre6_pkt,
+ sizeof(ice_fdir_tcp6_gre6_pkt),
+ ice_fdir_tcp6_gre6_pkt,
+ },
{
ICE_FLTR_PTYPE_NONF_IPV6_TCP,
sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt,
@@ -1523,6 +1788,28 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ICE_NONDMA_TO_NONDMA);
loc = &pkt[ICE_FDIR_GTPU_EH_INNER_PKT_OFF];
break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_TCP:
+ ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt,
+ ice_fdir_pkt[idx].tun_pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+ loc = &pkt[ICE_FDIR_IPV4_GRE_INNER_PKT_OFF];
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_TCP:
+ ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt,
+ ice_fdir_pkt[idx].tun_pkt_len,
+ ICE_NONDMA_TO_NONDMA);
+ loc = &pkt[ICE_FDIR_IPV6_GRE_INNER_PKT_OFF];
+ break;
default:
if (ice_fdir_get_open_tunnel_port(hw, flow, &tnl_port))
return ICE_ERR_DOES_NOT_EXIST;
@@ -1894,6 +2181,80 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_ECPRI_TP0_PC_ID_OFFSET,
input->ecpri_data.pc_id);
break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4:
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TOS_OFFSET,
+ input->ip.v4.tos);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_PROTO_OFFSET,
+ input->ip.v4.proto);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_TCP:
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(loc, ICE_TCP4_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v4.src_port);
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_TCP4_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TOS_OFFSET,
+ input->ip.v4.tos);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_UDP:
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u16(loc, ICE_UDP4_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v4.src_port);
+ ice_pkt_insert_u32(loc, ICE_IPV4_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_UDP4_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v4.dst_port);
+ ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TOS_OFFSET,
+ input->ip.v4.tos);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
+ input->ip.v6.tc);
+ ice_pkt_insert_u8(loc, ICE_IPV6_NO_MAC_PROTO_OFFSET,
+ input->ip.v6.proto);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_TCP:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_TCP6_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v6.src_port);
+ ice_pkt_insert_u16(loc, ICE_TCP6_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
+ input->ip.v6.tc);
+ break;
+ case ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_UDP:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u16(loc, ICE_UDP6_NO_MAC_DST_PORT_OFFSET,
+ input->ip.v6.src_port);
+ ice_pkt_insert_u16(loc, ICE_UDP6_NO_MAC_SRC_PORT_OFFSET,
+ input->ip.v6.dst_port);
+ ice_pkt_insert_u8_tc(loc, ICE_IPV6_NO_MAC_TC_OFFSET,
+ input->ip.v6.tc);
+ break;
case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
input->ip.v6.src_ip);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 1ba1084f38..a1147b4569 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -16,6 +16,8 @@
#define ICE_FDIR_GTPU_IP_INNER_PKT_OFF 50
#define ICE_FDIR_GTPU_EH_INNER_PKT_OFF 58
+#define ICE_FDIR_IPV4_GRE_INNER_PKT_OFF 38
+#define ICE_FDIR_IPV6_GRE_INNER_PKT_OFF 58
#define ICE_FDIR_TUN_PKT_OFF 50
#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 2bd2318b13..f7aa5f6139 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -350,6 +350,20 @@ enum ice_fltr_ptype {
ICE_FLTR_PTYPE_NONF_IPV4_UDP_ECPRI_TP0,
ICE_FLTR_PTYPE_FRAG_IPV4,
ICE_FLTR_PTYPE_FRAG_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_TCP,
ICE_FLTR_PTYPE_NONF_IPV6_UDP,
ICE_FLTR_PTYPE_NONF_IPV6_TCP,
ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
--
2.26.2
next prev parent reply other threads:[~2021-08-10 2:50 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 2:51 [dpdk-dev] [PATCH 00/28] ice: base code update Qi Zhang
2021-08-10 2:51 ` [dpdk-dev] [PATCH 01/28] net/ice/base: add 1588 capability probe Qi Zhang
2021-08-10 4:31 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 02/28] net/ice/base: add low level functions for device clock control Qi Zhang
2021-08-10 4:33 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 03/28] net/ice/base: add ethertype IPv6 check for dummy packet Qi Zhang
2021-08-10 4:34 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 04/28] net/ice/base: change dummy packets with VLAN Qi Zhang
2021-08-10 4:35 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 05/28] net/ice/base: add timestamp masks Qi Zhang
2021-08-10 4:35 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 06/28] net/ice/base: add clock initialization function Qi Zhang
2021-08-10 4:36 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 07/28] net/ice/base: add accessors to get/set the time reference Qi Zhang
2021-08-10 4:37 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 08/28] net/ice/base: print human-friendly PHY types Qi Zhang
2021-08-10 4:37 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 09/28] net/ice/base: implement Vernier calibration logic for E822 devices Qi Zhang
2021-08-10 4:38 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 10/28] net/ice/base: clarify comments on checking PFC mode Qi Zhang
2021-08-10 4:39 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 11/28] net/ice/base: add support for starting PHY in bypass mode Qi Zhang
2021-08-10 4:39 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 12/28] net/ice/base: add E810T check function Qi Zhang
2021-08-10 4:39 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 13/28] net/ice/base: implement firmware debug dump Qi Zhang
2021-08-10 4:40 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 14/28] net/ice/base: add new AQ description Qi Zhang
2021-08-10 4:40 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 15/28] net/ice/base: refine MAC rule adding Qi Zhang
2021-08-10 4:41 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 16/28] net/ice/base: support TC nodes PIR configuration Qi Zhang
2021-08-10 4:41 ` Guo, Junfeng
2021-08-10 2:51 ` Qi Zhang [this message]
2021-08-10 4:41 ` [dpdk-dev] [PATCH 17/28] net/ice/base: support FDIR for GRE tunnel packet Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 18/28] net/ice/base: support RSS " Qi Zhang
2021-08-10 4:42 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 19/28] net/ice/base: support FDIR for GTPU EH inner IPv6 Qi Zhang
2021-08-10 4:43 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 20/28] net/ice/base: support RSS for GTPoGRE Qi Zhang
2021-08-10 4:43 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 21/28] net/ice/base: enable NVM update reset capabilities Qi Zhang
2021-08-10 4:43 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 22/28] net/ice/base: support FDIR for GTPoGRE Qi Zhang
2021-08-10 4:44 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 23/28] net/ice/base: add RSS support for IPv4/L4 checksum Qi Zhang
2021-08-10 4:45 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 24/28] net/ice/base: enable jumbo frame support during HW init Qi Zhang
2021-08-10 4:45 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 25/28] net/ice/base: support FDIR for GTPU UL/DL with QFI fields Qi Zhang
2021-08-10 4:46 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 26/28] net/ice/base: rename and add a setter function Qi Zhang
2021-08-10 4:46 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 27/28] net/ice/base: correct spellling of word data Qi Zhang
2021-08-10 4:46 ` Guo, Junfeng
2021-08-13 16:50 ` Ferruh Yigit
2021-08-13 16:53 ` Ferruh Yigit
2021-08-10 2:51 ` [dpdk-dev] [PATCH 28/28] net/ice/base: update Max TCAM/PTG Per Profile Qi Zhang
2021-08-10 4:47 ` Guo, Junfeng
2021-08-11 2:25 ` [dpdk-dev] [PATCH 00/28] ice: base code update Zhang, Qi Z
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210810025140.1698163-18-qi.z.zhang@intel.com \
--to=qi.z.zhang@intel.com \
--cc=dev@dpdk.org \
--cc=junfeng.guo@intel.com \
--cc=qiming.yang@intel.com \
--cc=wenjun1.wu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).