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intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT055.mail.protection.outlook.com (10.13.177.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4436.19 via Frontend Transport; Mon, 23 Aug 2021 06:39:28 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 23 Aug 2021 06:39:26 +0000 From: Xueming Li To: CC: , , Maxime Coquelin , Chenbo Xia Date: Mon, 23 Aug 2021 09:39:06 +0300 Message-ID: <20210823063906.1382544-1-xuemingl@nvidia.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 200f40e9-1f0a-42ae-d0f2-08d96600c189 X-MS-TrafficTypeDiagnostic: DM6PR12MB4619: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; 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CAT:NONE; SFS:(4636009)(136003)(39860400002)(396003)(346002)(376002)(46966006)(36840700001)(356005)(8936002)(6286002)(36756003)(82740400003)(5660300002)(2616005)(7636003)(8676002)(426003)(16526019)(186003)(336012)(55016002)(82310400003)(47076005)(2906002)(54906003)(316002)(36906005)(7696005)(4744005)(26005)(478600001)(109986005)(70206006)(70586007)(36860700001)(86362001)(1076003)(4326008)(6666004)(83380400001)(266003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Aug 2021 06:39:28.1214 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 200f40e9-1f0a-42ae-d0f2-08d96600c189 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT055.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4619 Subject: [dpdk-dev] [PATCH] net/virtio: wait device ready in device reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" According to virtio spec, the device MUST reset when 0 is written to device_status, and present a 0 in device_status once that is done. This patch adds the missing part of waiting status 0 in reset function. Signed-off-by: Xueming Li --- drivers/net/virtio/virtio.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/virtio/virtio.c b/drivers/net/virtio/virtio.c index 7e1e77797f..f003f612d6 100644 --- a/drivers/net/virtio/virtio.c +++ b/drivers/net/virtio/virtio.c @@ -3,6 +3,8 @@ * Copyright(c) 2020 Red Hat, Inc. */ +#include + #include "virtio.h" uint64_t @@ -39,8 +41,9 @@ void virtio_reset(struct virtio_hw *hw) { VIRTIO_OPS(hw)->set_status(hw, VIRTIO_CONFIG_STATUS_RESET); - /* flush status write */ - VIRTIO_OPS(hw)->get_status(hw); + /* Flush status write and wait device ready. */ + while (VIRTIO_OPS(hw)->get_status(hw) != VIRTIO_CONFIG_STATUS_RESET) + usleep(1000L); } void -- 2.25.1