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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.35 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.35; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.35) by BN8NAM11FT031.mail.protection.outlook.com (10.13.177.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4457.17 via Frontend Transport; Tue, 31 Aug 2021 20:38:07 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 31 Aug 2021 20:38:05 +0000 Received: from nvidia.com (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 31 Aug 2021 20:38:03 +0000 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Date: Tue, 31 Aug 2021 23:37:31 +0300 Message-ID: <20210831203732.3411134-6-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210831203732.3411134-1-michaelba@nvidia.com> References: <20210831203732.3411134-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 09ff88f3-7f9a-4602-e794-08d96cbf3dca X-MS-TrafficTypeDiagnostic: DM5PR1201MB0217: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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CAT:NONE; SFS:(4636009)(39860400002)(346002)(376002)(136003)(396003)(36840700001)(46966006)(8936002)(6916009)(6286002)(6666004)(47076005)(4326008)(450100002)(36860700001)(36756003)(426003)(186003)(1076003)(336012)(2906002)(2616005)(26005)(83380400001)(86362001)(478600001)(8676002)(7696005)(316002)(7636003)(5660300002)(82740400003)(356005)(70586007)(70206006)(16526019)(36906005)(55016002)(82310400003)(54906003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2021 20:38:07.9257 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09ff88f3-7f9a-4602-e794-08d96cbf3dca X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.35]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT031.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1201MB0217 Subject: [dpdk-dev] [PATCH 5/6] common/mlx5: fix device list operation concurrency X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The MLX5 common driver has a global list of mlx5 devices which are probed. In probe function it create one and insert it to the list. Similarly it removes the device in remove function. These operations are not safe as there can be such operations in parallel, by different threads. Add global lock for the list and use it to insert or remove. Fixes: 8a41f4deccc3 ("common/mlx5: introduce layer for multiple class drivers") Cc: stable@dpdk.org Signed-off-by: Michael Baum --- drivers/common/mlx5/mlx5_common.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c index f6e440dca1..4321cb3a9c 100644 --- a/drivers/common/mlx5/mlx5_common.c +++ b/drivers/common/mlx5/mlx5_common.c @@ -50,6 +50,7 @@ static TAILQ_HEAD(mlx5_drivers, mlx5_class_driver) drivers_list = /* Head of devices. */ static TAILQ_HEAD(mlx5_devices, mlx5_common_device) devices_list = TAILQ_HEAD_INITIALIZER(devices_list); +static pthread_mutex_t devices_list_lock; static const struct { const char *name; @@ -222,7 +223,9 @@ mlx5_dev_to_pci_str(const struct rte_device *dev, char *addr, size_t size) static void dev_release(struct mlx5_common_device *dev) { + pthread_mutex_lock(&devices_list_lock); TAILQ_REMOVE(&devices_list, dev, next); + pthread_mutex_unlock(&devices_list_lock); rte_free(dev); } @@ -315,7 +318,9 @@ mlx5_common_dev_probe(struct rte_device *eal_dev) if (!dev) return -ENOMEM; dev->dev = eal_dev; + pthread_mutex_lock(&devices_list_lock); TAILQ_INSERT_HEAD(&devices_list, dev, next); + pthread_mutex_unlock(&devices_list_lock); new_device = true; } /* @@ -440,6 +445,7 @@ mlx5_common_init(void) if (mlx5_common_initialized) return; + pthread_mutex_init(&devices_list_lock, NULL); mlx5_glue_constructor(); mlx5_common_driver_init(); mlx5_common_initialized = true; -- 2.25.1