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From: Michael Baum <michaelba@nvidia.com>
To: <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>, <stable@dpdk.org>
Subject: [dpdk-dev] [PATCH v2] crypto/mlx5: fix timestamp format configuration
Date: Sun, 5 Sep 2021 11:04:15 +0300	[thread overview]
Message-ID: <20210905080415.3836354-1-michaelba@nvidia.com> (raw)
In-Reply-To: <20210831204015.3411435-1-michaelba@nvidia.com>

This patch adds support for the timestamp format settings for
the receive and send queues. If the firmware version x.30.1000
or above is installed and the NIC timestamps are configured
with the real-time format, the default zero values for newly
added fields cause the queue creation to fail.

The patch queries the timestamp formats supported by the hardware
and sets the configuration values in queue context accordingly.

Fixes: 6152534e211e ("crypto/mlx5: support queue pairs operations")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---

v2: Align title and description of the patch to a fix format.

 drivers/crypto/mlx5/mlx5_crypto.c | 2 ++
 drivers/crypto/mlx5/mlx5_crypto.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index b3d5200ca3..e01be15ade 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -707,6 +707,7 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 	attr.wq_umem_id = qp->umem_obj->umem_id;
 	attr.wq_umem_offset = 0;
 	attr.dbr_umem_id = qp->umem_obj->umem_id;
+	attr.ts_format = mlx5_ts_format_conv(priv->qp_ts_format);
 	attr.dbr_address = RTE_BIT64(log_nb_desc) * priv->wqe_set_size;
 	qp->qp_obj = mlx5_devx_cmd_create_qp(priv->ctx, &attr);
 	if (qp->qp_obj == NULL) {
@@ -1049,6 +1050,7 @@ mlx5_crypto_dev_probe(struct rte_device *dev)
 	priv->ctx = ctx;
 	priv->login_obj = login;
 	priv->crypto_dev = crypto_dev;
+	priv->qp_ts_format = attr.qp_ts_format;
 	if (mlx5_crypto_hw_global_prepare(priv) != 0) {
 		rte_cryptodev_pmd_destroy(priv->crypto_dev);
 		claim_zero(mlx5_glue->close_device(priv->ctx));
diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index d49b0001f0..722acb8d19 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -25,6 +25,7 @@ struct mlx5_crypto_priv {
 	volatile uint64_t *uar_addr;
 	uint32_t pdn; /* Protection Domain number. */
 	uint32_t max_segs_num; /* Maximum supported data segs. */
+	uint8_t qp_ts_format; /* Whether QP supports timestamp formats. */
 	struct ibv_pd *pd;
 	struct mlx5_hlist *dek_hlist; /* Dek hash list. */
 	struct rte_cryptodev_config dev_config;
-- 
2.25.1


  parent reply	other threads:[~2021-09-05  8:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-31 20:40 [dpdk-dev] [PATCH] crypto/mlx5: support timestamp format Michael Baum
2021-09-01  7:48 ` Matan Azrad
2021-09-02 10:13 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-09-02 11:52   ` Michael Baum
2021-09-05  8:04 ` Michael Baum [this message]
2021-09-06 18:15   ` [dpdk-dev] [EXT] [PATCH v2] crypto/mlx5: fix timestamp format configuration Akhil Goyal

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