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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT057.mail.protection.outlook.com (10.13.177.49) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4500.14 via Frontend Transport; Sun, 12 Sep 2021 10:36:54 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 12 Sep 2021 10:36:53 +0000 Received: from nvidia.com (172.20.187.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 12 Sep 2021 10:36:51 +0000 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Date: Sun, 12 Sep 2021 13:36:25 +0300 Message-ID: <20210912103628.257499-4-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210912103628.257499-1-michaelba@nvidia.com> References: <20210831203732.3411134-1-michaelba@nvidia.com> <20210912103628.257499-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 349679fa-5cf3-4377-6614-08d975d93d2b X-MS-TrafficTypeDiagnostic: MW2PR12MB2540: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; 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CAT:NONE; SFS:(4636009)(136003)(39860400002)(376002)(346002)(396003)(36840700001)(46966006)(2906002)(6916009)(2616005)(47076005)(7636003)(6666004)(86362001)(8936002)(16526019)(5660300002)(26005)(1076003)(478600001)(450100002)(4326008)(7696005)(36756003)(82310400003)(55016002)(186003)(6286002)(8676002)(426003)(336012)(70586007)(70206006)(82740400003)(36860700001)(83380400001)(356005)(316002)(36906005)(54906003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2021 10:36:54.2524 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 349679fa-5cf3-4377-6614-08d975d93d2b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT057.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2540 Subject: [dpdk-dev] [PATCH v2 3/6] net/mlx5: fix allow duplicate pattern devarg default X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In order to allow\disallow configuring rules with identical patterns, the new device argument 'allow_duplicate_pattern' was introduced. The default is to allow, and it is initialized to 1 in PCI probe function. However, on auxiliary bus probing (for Sub-Function) it is not initialized at all, so it's actually initialized to 0 Move the initialization to default config function which is called from both. Fixes: 919488fbfa71 ("net/mlx5: support Sub-Function") Cc: stable@dpdk.org Signed-off-by: Michael Baum Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 3d204f99f7..cf4de7e6f9 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -2142,6 +2142,7 @@ mlx5_os_config_default(struct mlx5_dev_config *config) config->dv_flow_en = 1; config->decap_en = 1; config->log_hp_size = MLX5_ARG_UNSET; + config->allow_duplicate_pattern = 1; } /** @@ -2564,7 +2565,6 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, /* Default configuration. */ mlx5_os_config_default(&dev_config); dev_config.vf = dev_config_vf; - dev_config.allow_duplicate_pattern = 1; list[i].numa_node = pci_dev->device.numa_node; list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, &list[i], -- 2.25.1