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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.32 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.32; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.32) by CO1NAM11FT055.mail.protection.outlook.com (10.13.175.129) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4500.14 via Frontend Transport; Sun, 12 Sep 2021 16:37:15 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 12 Sep 2021 09:37:14 -0700 Received: from nvidia.com (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 12 Sep 2021 16:37:13 +0000 From: Raja Zidane <rzidane@nvidia.com> To: <dev@dpdk.org> Date: Sun, 12 Sep 2021 16:36:47 +0000 Message-ID: <20210912163652.24983-1-rzidane@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210903142157.25617-2-rzidane@nvidia.com> References: <20210903142157.25617-2-rzidane@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8368a354-68b1-4e0e-00db-08d9760b9439 X-MS-TrafficTypeDiagnostic: DM5PR12MB2406: X-Microsoft-Antispam-PRVS: <DM5PR12MB240653C96F10D727AEEB65D3C7D89@DM5PR12MB2406.namprd12.prod.outlook.com> X-MS-Oob-TLC-OOBClassifiers: OLM:7691; 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CAT:NONE; SFS:(4636009)(39860400002)(376002)(396003)(136003)(346002)(46966006)(36840700001)(6286002)(26005)(1076003)(8936002)(8676002)(47076005)(70206006)(70586007)(82310400003)(5660300002)(2616005)(16526019)(2906002)(186003)(7696005)(7636003)(426003)(55016002)(6916009)(316002)(356005)(36860700001)(36756003)(86362001)(83380400001)(478600001)(6666004)(82740400003)(336012); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2021 16:37:15.1998 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8368a354-68b1-4e0e-00db-08d9760b9439 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT055.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2406 Subject: [dpdk-dev] [PATCH V2 0/5] mlx5: replaced hardware queue object X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> The mlx5 PMDs for compress and regex classes use an MMO WQE operated by the GGA engine in BF devices. Currently, all the MMO WQEs are managed by the SQ object. Starting from BF3, the queue of the MMO WQEs should be connected to the GGA engine using a new configuration, mmo, that will be supported only in the QP object. The FW introduced new capabilities to define whether the mmo configuration should be configured for the GGA queue. Replace all the GGA queue objects to QP, set mmo configuration according to the new FW capabilities. V2: fix coding style issues. Raja Zidane (5): common/mlx5: share DevX QP operations common/mlx5: update new MMO HCA capabilities common/mlx5: add MMO configuration for the DevX QP compress/mlx5: refactor queue HW object regex/mlx5: refactor HW queue objects drivers/common/mlx5/mlx5_common_devx.c | 144 +++++++++++++++++++ drivers/common/mlx5/mlx5_common_devx.h | 23 +++ drivers/common/mlx5/mlx5_devx_cmds.c | 23 ++- drivers/common/mlx5/mlx5_devx_cmds.h | 13 +- drivers/common/mlx5/mlx5_prm.h | 48 ++++++- drivers/common/mlx5/version.map | 3 + drivers/compress/mlx5/mlx5_compress.c | 73 +++++----- drivers/crypto/mlx5/mlx5_crypto.c | 100 ++++--------- drivers/crypto/mlx5/mlx5_crypto.h | 5 +- drivers/regex/mlx5/mlx5_regex.c | 7 +- drivers/regex/mlx5/mlx5_regex.h | 16 ++- drivers/regex/mlx5/mlx5_regex_control.c | 65 +++++---- drivers/regex/mlx5/mlx5_regex_fastpath.c | 170 ++++++++++++----------- drivers/vdpa/mlx5/mlx5_vdpa.h | 5 +- drivers/vdpa/mlx5/mlx5_vdpa_event.c | 59 +++----- 15 files changed, 460 insertions(+), 294 deletions(-) -- 2.17.1