DPDK patches and discussions
 help / color / mirror / Atom feed
From: Tal Shnaiderman <talshn@nvidia.com>
To: <dev@dpdk.org>
Cc: <thomas@monjalon.net>, <matan@nvidia.com>, <rasland@nvidia.com>,
	<asafp@nvidia.com>, <gakhil@marvell.com>,
	<declan.doherty@intel.com>, <viacheslavo@nvidia.com>,
	<eilong@nvidia.com>
Subject: [dpdk-dev] [RFC PATCH 08/10] crypto/mlx5: use OS agnostic functions for Verbs operations
Date: Tue, 14 Sep 2021 08:38:31 +0300	[thread overview]
Message-ID: <20210914053833.7760-9-talshn@nvidia.com> (raw)
In-Reply-To: <20210914053833.7760-1-talshn@nvidia.com>

use the functions mlx5_os_open_device_context, mlx5_os_get_ctx_device_name
mlx5_os_reg_mr mlx5_os_dereg_mr instead of the ib verbs functions
and variables to support device operations on all OSs.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
---
 drivers/crypto/mlx5/mlx5_crypto.c | 41 +++++++++++++++++----------------------
 drivers/crypto/mlx5/mlx5_crypto.h |  2 +-
 2 files changed, 19 insertions(+), 24 deletions(-)

diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index 35319d0115..3f5a6745dc 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -796,9 +796,6 @@ mlx5_crypto_hw_global_release(struct mlx5_crypto_priv *priv)
 static int
 mlx5_crypto_pd_create(struct mlx5_crypto_priv *priv)
 {
-#ifdef HAVE_IBV_FLOW_DV_SUPPORT
-	struct mlx5dv_obj obj;
-	struct mlx5dv_pd pd_info;
 	int ret;
 
 	priv->pd = mlx5_os_alloc_pd(priv->ctx);
@@ -814,11 +811,6 @@ mlx5_crypto_pd_create(struct mlx5_crypto_priv *priv)
 		return -errno;
 	}
 	return 0;
-#else
-	(void)priv;
-	DRV_LOG(ERR, "Cannot get pdn - no DV support.");
-	return -ENOTSUP;
-#endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 }
 
 static int
@@ -964,8 +956,8 @@ mlx5_crypto_mr_mem_event_cb(enum rte_mem_event event_type, const void *addr,
 		/* Iterate all the existing mlx5 devices. */
 		TAILQ_FOREACH(priv, &mlx5_crypto_priv_list, next)
 			mlx5_free_mr_by_addr(&priv->mr_scache,
-					     priv->ctx->device->name,
-					     addr, len);
+					     mlx5_os_get_ctx_device_name(
+					     priv->ctx), addr, len);
 		pthread_mutex_unlock(&priv_list_lock);
 		break;
 	case RTE_MEM_EVENT_ALLOC:
@@ -977,9 +969,9 @@ mlx5_crypto_mr_mem_event_cb(enum rte_mem_event event_type, const void *addr,
 static int
 mlx5_crypto_dev_probe(struct rte_device *dev)
 {
-	struct ibv_device *ibv;
 	struct rte_cryptodev *crypto_dev;
-	struct ibv_context *ctx;
+	void *ctx;
+	const char *device_name;
 	struct mlx5_devx_obj *login;
 	struct mlx5_crypto_priv *priv;
 	struct mlx5_crypto_devarg_params devarg_prms = { 0 };
@@ -999,15 +991,19 @@ mlx5_crypto_dev_probe(struct rte_device *dev)
 		rte_errno = ENOTSUP;
 		return -rte_errno;
 	}
-	ibv = mlx5_os_get_ibv_dev(dev);
-	if (ibv == NULL)
-		return -rte_errno;
-	ctx = mlx5_glue->dv_open_device(ibv);
+	ctx = mlx5_os_open_device_context(dev);
 	if (ctx == NULL) {
-		DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name);
+		DRV_LOG(ERR, "Failed to open IB device.");
 		rte_errno = ENODEV;
 		return -rte_errno;
 	}
+	device_name = mlx5_os_get_ctx_device_name(ctx);
+	if (!device_name) {
+		DRV_LOG(ERR, "Failed getting device name");
+		claim_zero(mlx5_glue->close_device(ctx));
+		rte_errno = ENODEV;
+		return -ENODEV;
+	}
 	if (mlx5_devx_cmd_query_hca_attr(ctx, &attr) != 0 ||
 	    attr.crypto == 0 || attr.aes_xts == 0) {
 		DRV_LOG(ERR, "Not enough capabilities to support crypto "
@@ -1029,15 +1025,14 @@ mlx5_crypto_dev_probe(struct rte_device *dev)
 		claim_zero(mlx5_glue->close_device(ctx));
 		return -rte_errno;
 	}
-	crypto_dev = rte_cryptodev_pmd_create(ibv->name, dev,
-					&init_params);
+	crypto_dev = rte_cryptodev_pmd_create(device_name, dev, &init_params);
 	if (crypto_dev == NULL) {
-		DRV_LOG(ERR, "Failed to create device \"%s\".", ibv->name);
+		DRV_LOG(ERR, "Failed to create device \"%s\".", device_name);
 		claim_zero(mlx5_glue->close_device(ctx));
 		return -ENODEV;
 	}
 	DRV_LOG(INFO,
-		"Crypto device %s was created successfully.", ibv->name);
+		"Crypto device %s was created successfully.", device_name);
 	crypto_dev->dev_ops = &mlx5_crypto_ops;
 	crypto_dev->dequeue_burst = mlx5_crypto_dequeue_burst;
 	crypto_dev->enqueue_burst = mlx5_crypto_enqueue_burst;
@@ -1061,8 +1056,8 @@ mlx5_crypto_dev_probe(struct rte_device *dev)
 		rte_errno = ENOMEM;
 		return -rte_errno;
 	}
-	priv->mr_scache.reg_mr_cb = mlx5_common_verbs_reg_mr;
-	priv->mr_scache.dereg_mr_cb = mlx5_common_verbs_dereg_mr;
+	priv->mr_scache.reg_mr_cb = mlx5_os_reg_mr;
+	priv->mr_scache.dereg_mr_cb = mlx5_os_dereg_mr;
 	priv->keytag = rte_cpu_to_be_64(devarg_prms.keytag);
 	priv->max_segs_num = devarg_prms.max_segs_num;
 	priv->umr_wqe_size = sizeof(struct mlx5_wqe_umr_bsf_seg) +
diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index 91e3f438b8..57461a8a33 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -19,7 +19,7 @@
 
 struct mlx5_crypto_priv {
 	TAILQ_ENTRY(mlx5_crypto_priv) next;
-	struct ibv_context *ctx; /* Device context. */
+	void *ctx; /* Device context. */
 	struct rte_cryptodev *crypto_dev;
 	void *uar; /* User Access Region. */
 	volatile uint64_t *uar_addr;
-- 
2.16.1.windows.4


  parent reply	other threads:[~2021-09-14  5:40 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-14  5:38 [dpdk-dev] [RFC PATCH 00/10] Support MLX5 crypto driver on Windows Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 01/10] common/mlx5: add DV enums to Windows defs file Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 02/10] common/mlx5: add an agnostic OS function to open device context Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 03/10] common/mlx5: move pdn getter to common driver Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 04/10] common/mlx5: add memory region OS agnostic functions for Linux Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 05/10] crypto/mlx5: replace UNIX functions with EAL functions Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 06/10] crypto/mlx5: use OS agnostic functions for UMEM operations Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 07/10] crypto/mlx5: use OS agnostic functions for PD operations Tal Shnaiderman
2021-09-14  5:38 ` Tal Shnaiderman [this message]
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 09/10] crypto/mlx5: fix size of UMR WQE Tal Shnaiderman
2021-09-14  5:38 ` [dpdk-dev] [RFC PATCH 10/10] crypto/mlx5: support on Windows Tal Shnaiderman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210914053833.7760-9-talshn@nvidia.com \
    --to=talshn@nvidia.com \
    --cc=asafp@nvidia.com \
    --cc=declan.doherty@intel.com \
    --cc=dev@dpdk.org \
    --cc=eilong@nvidia.com \
    --cc=gakhil@marvell.com \
    --cc=matan@nvidia.com \
    --cc=rasland@nvidia.com \
    --cc=thomas@monjalon.net \
    --cc=viacheslavo@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).