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From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: junfeng.guo@intel.com, dev@dpdk.org,
	Qi Zhang <qi.z.zhang@intel.com>,
	Jacob Keller <jacob.e.keller@intel.com>
Subject: [dpdk-dev] [PATCH 10/12] net/ice/base: add get/set functions for shared parameters
Date: Thu, 16 Sep 2021 17:53:02 +0800	[thread overview]
Message-ID: <20210916095304.3058210-11-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20210916095304.3058210-1-qi.z.zhang@intel.com>

Add functions used by the driver for setting and getting the shared
driver parameters. These will be used by the driver in order to share
the PTP clock index identifier between PF drivers.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 10 ++++
 drivers/net/ice/base/ice_common.c     | 75 +++++++++++++++++++++++++++
 drivers/net/ice/base/ice_common.h     |  6 +++
 3 files changed, 91 insertions(+)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index e9d6fcc3ad..253b971dfd 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -2713,6 +2713,16 @@ struct ice_aqc_driver_shared_params {
 	__le32 addr_low;
 };
 
+enum ice_aqc_driver_params {
+	/* OS clock index for PTP timer Domain 0 */
+	ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0 = 0,
+	/* OS clock index for PTP timer Domain 1 */
+	ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1,
+
+	/* Add new parameters above */
+	ICE_AQC_DRIVER_PARAM_MAX = 16,
+};
+
 /* Lan Queue Overflow Event (direct, 0x1001) */
 struct ice_aqc_event_lan_overflow {
 	__le32 prtdcb_ruptq;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 46b0dd11b8..ae55bebaa2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -5494,6 +5494,81 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
 	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
 
+/**
+ * ice_aq_set_driver_param - Set driver parameter to share via firmware
+ * @hw: pointer to the HW struct
+ * @idx: parameter index to set
+ * @value: the value to set the parameter to
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the value of one of the software defined parameters. All PFs connected
+ * to this device can read the value using ice_aq_get_driver_param.
+ *
+ * Note that firmware provides no synchronization or locking, and will not
+ * save the parameter value during a device reset. It is expected that
+ * a single PF will write the parameter value, while all other PFs will only
+ * read it.
+ */
+enum ice_status
+ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
+			u32 value, struct ice_sq_cd *cd)
+{
+	struct ice_aqc_driver_shared_params *cmd;
+	struct ice_aq_desc desc;
+
+	if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
+		return ICE_ERR_OUT_OF_RANGE;
+
+	cmd = &desc.params.drv_shared_params;
+
+	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);
+
+	cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_SET;
+	cmd->param_indx = idx;
+	cmd->param_val = CPU_TO_LE32(value);
+
+	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_get_driver_param - Get driver parameter shared via firmware
+ * @hw: pointer to the HW struct
+ * @idx: parameter index to set
+ * @value: storage to return the shared parameter
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get the value of one of the software defined parameters.
+ *
+ * Note that firmware provides no synchronization or locking. It is expected
+ * that only a single PF will write a given parameter.
+ */
+enum ice_status
+ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
+			u32 *value, struct ice_sq_cd *cd)
+{
+	struct ice_aqc_driver_shared_params *cmd;
+	struct ice_aq_desc desc;
+	enum ice_status status;
+
+	if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
+		return ICE_ERR_OUT_OF_RANGE;
+
+	cmd = &desc.params.drv_shared_params;
+
+	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);
+
+	cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_GET;
+	cmd->param_indx = idx;
+
+	status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+	if (status)
+		return status;
+
+	*value = LE32_TO_CPU(cmd->param_val);
+
+	return ICE_SUCCESS;
+}
+
 /**
  * ice_aq_set_gpio
  * @hw: pointer to the hw struct
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index a5bfdc072e..1d8882c279 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -251,6 +251,12 @@ enum ice_status
 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
 		     struct ice_aqc_txsched_elem_data *buf);
 enum ice_status
+ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
+			u32 value, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
+			u32 *value, struct ice_sq_cd *cd);
+enum ice_status
 ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
 		struct ice_sq_cd *cd);
 enum ice_status
-- 
2.26.2


  parent reply	other threads:[~2021-09-16  9:50 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-16  9:52 [dpdk-dev] [PATCH 00/12] ice base code batch 2 for DPDK 21.11 Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 01/12] net/ice/base: calculate logical PF ID Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 02/12] net/ice/base: include more E810T adapters Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 03/12] net/ice/base: use macro instead of open-coded division Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 04/12] net/ice/base: allow to enable LAN and loopback in switch Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 05/12] net/ice/base: change addr param to u16 Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 06/12] net/ice/base: allow tool access to MNG register Qi Zhang
2021-09-16  9:52 ` [dpdk-dev] [PATCH 07/12] net/ice/base: add package segment ID Qi Zhang
2021-09-16  9:53 ` [dpdk-dev] [PATCH 08/12] net/ice/base: add a helper to check for 100M speed support Qi Zhang
2021-09-16  9:53 ` [dpdk-dev] [PATCH 09/12] net/ice/base: add GCO defines and new GCO flex descriptor Qi Zhang
2021-09-16  9:53 ` Qi Zhang [this message]
2021-09-16  9:53 ` [dpdk-dev] [PATCH 11/12] net/ice/base: implement support for SMA controller Qi Zhang
2021-09-22 12:43   ` Ferruh Yigit
2021-09-22 12:56     ` Machnikowski, Maciej
2021-09-22 13:51       ` Ferruh Yigit
2021-09-16  9:53 ` [dpdk-dev] [PATCH 12/12] net/ice/base: update auto generated hardware register Qi Zhang
2021-09-17  2:14 ` [dpdk-dev] [PATCH 00/12] ice base code batch 2 for DPDK 21.11 Guo, Junfeng
2021-09-17  8:48   ` Zhang, Qi Z
2021-09-22 12:45     ` Ferruh Yigit
2021-09-23  0:21       ` Zhang, Qi Z

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