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From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>
Subject: [dpdk-dev] [PATCH 20/20] net/ice/base: add API for parser profile initialization
Date: Fri, 17 Sep 2021 19:02:42 +0800	[thread overview]
Message-ID: <20210917110242.3127658-21-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20210917110242.3127658-1-qi.z.zhang@intel.com>

Add API ice_parser_profile_init to init a parser profile base on
a parser result and a mask buffer. The ice_parser_profile can feed to
low level FXP engine to create HW profile / field vector directly.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_parser.c | 112 ++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_parser.h |  24 +++++++
 2 files changed, 136 insertions(+)

diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index c8272cb9c2..9180b358eb 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -442,3 +442,115 @@ enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
 {
 	return _tunnel_port_set(psr, "TNL_UDP_ECPRI", udp_port, on);
 }
+
+static bool _nearest_proto_id(struct ice_parser_result *rslt, u16 offset,
+			      u8 *proto_id, u16 *proto_off)
+{
+	u16 dist = 0xffff;
+	u8 p = 0;
+	int i;
+
+	for (i = 0; i < rslt->po_num; i++) {
+		if (offset < rslt->po[i].offset)
+			continue;
+		if (offset - rslt->po[i].offset < dist) {
+			p = rslt->po[i].proto_id;
+			dist = offset - rslt->po[i].offset;
+		}
+	}
+
+	if (dist % 2)
+		return false;
+
+	*proto_id = p;
+	*proto_off = dist;
+
+	return true;
+}
+
+/** default flag mask to cover GTP_EH_PDU, GTP_EH_PDU_LINK and TUN2
+ * In future, the flag masks should learn from DDP
+ */
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_SW	0x4002
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_ACL	0x0000
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_FD	0x6080
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_RSS	0x6010
+
+/**
+ * ice_parser_profile_init  - initialize a FXP profile base on parser result
+ * @rslt: a instance of a parser result
+ * @pkt_buf: packet data buffer
+ * @pkt_msk: packet mask buffer
+ * @pkt_len: packet length
+ * @blk: FXP pipeline stage
+ * @prefix_match: match protocol stack exactly or only prefix
+ * @prof: input/output parameter to save the profile
+ */
+enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,
+					const u8 *pkt_buf, const u8 *msk_buf,
+					int buf_len, enum ice_block blk,
+					bool prefix_match,
+					struct ice_parser_profile *prof)
+{
+	u8 proto_id = 0xff;
+	u16 proto_off = 0;
+	u16 off;
+
+	ice_memset(prof, 0, sizeof(*prof), ICE_NONDMA_MEM);
+	ice_set_bit(rslt->ptype, prof->ptypes);
+	if (blk == ICE_BLK_SW) {
+		prof->flags = rslt->flags_sw;
+		prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_SW;
+	} else if (blk == ICE_BLK_ACL) {
+		prof->flags = rslt->flags_acl;
+		prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_ACL;
+	} else if (blk == ICE_BLK_FD) {
+		prof->flags = rslt->flags_fd;
+		prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_FD;
+	} else if (blk == ICE_BLK_RSS) {
+		prof->flags = rslt->flags_rss;
+		prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_RSS;
+	} else {
+		return ICE_ERR_PARAM;
+	}
+
+	for (off = 0; off < buf_len - 1; off++) {
+		if (msk_buf[off] == 0 && msk_buf[off + 1] == 0)
+			continue;
+		if (!_nearest_proto_id(rslt, off, &proto_id, &proto_off))
+			continue;
+		if (prof->fv_num >= 32)
+			return ICE_ERR_PARAM;
+
+		prof->fv[prof->fv_num].proto_id = proto_id;
+		prof->fv[prof->fv_num].offset = proto_off;
+		prof->fv[prof->fv_num].spec = *(const u16 *)&pkt_buf[off];
+		prof->fv[prof->fv_num].msk = *(const u16 *)&msk_buf[off];
+		prof->fv_num++;
+	}
+
+	return ICE_SUCCESS;
+}
+
+/**
+ * ice_parser_profile_dump - dump an FXP profile info
+ * @hw: pointer to the hardware structure
+ * @prof: profile info to dump
+ */
+void ice_parser_profile_dump(struct ice_hw *hw, struct ice_parser_profile *prof)
+{
+	u16 i;
+
+	ice_info(hw, "ptypes:\n");
+	for (i = 0; i < ICE_FLOW_PTYPE_MAX; i++)
+		if (ice_is_bit_set(prof->ptypes, i))
+			ice_info(hw, "\t%d\n", i);
+
+	for (i = 0; i < prof->fv_num; i++)
+		ice_info(hw, "proto = %d, offset = %d spec = 0x%04x, mask = 0x%04x\n",
+			 prof->fv[i].proto_id, prof->fv[i].offset,
+			 prof->fv[i].spec, prof->fv[i].msk);
+
+	ice_info(hw, "flags = 0x%04x\n", prof->flags);
+	ice_info(hw, "flags_msk = 0x%04x\n", prof->flags_msk);
+}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 5c77d7d98c..690144d77b 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -86,4 +86,28 @@ struct ice_parser_result {
 enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
 			       int pkt_len, struct ice_parser_result *rslt);
 void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt);
+
+struct ice_parser_fv {
+	u8 proto_id; /* hardware protocol ID */
+	u16 offset; /* offset from the start of the protocol header */
+	u16 spec; /* 16 bits pattern to match */
+	u16 msk; /* 16 bits pattern mask */
+};
+
+struct ice_parser_profile {
+	struct ice_parser_fv fv[48]; /* field vector arrary */
+	int fv_num; /* field vector number must <= 48 */
+	u16 flags; /* 16 bits key builder flag */
+	u16 flags_msk; /* key builder flag masker */
+	/* 1024 bits PTYPE bitmap */
+	ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
+};
+
+enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,
+					const u8 *pkt_buf, const u8 *msk_buf,
+					int buf_len, enum ice_block blk,
+					bool prefix_match,
+					struct ice_parser_profile *prof);
+void ice_parser_profile_dump(struct ice_hw *hw,
+			     struct ice_parser_profile *prof);
 #endif /* _ICE_PARSER_H_ */
-- 
2.26.2


      parent reply	other threads:[~2021-09-17 11:02 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 01/20] net/ice/base: add parser create and destroy skeleton Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 02/20] net/ice/base: init imem table for parser Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 03/20] net/ice/base: init metainit " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 04/20] net/ice/base: init parse graph cam " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 05/20] net/ice/base: init boost TCAM " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 06/20] net/ice/base: init ptype marker " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 07/20] net/ice/base: init marker group " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 08/20] net/ice/base: init protocol " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 09/20] net/ice/base: init flag redirect " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 10/20] net/ice/base: init XLT key builder " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 11/20] net/ice/base: add parser runtime skeleton Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 12/20] net/ice/base: add helper function for boost TCAM match Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 13/20] net/ice/base: add helper functions for parse graph key matching Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 14/20] net/ice/base: add helper function for ptype markers match Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 15/20] net/ice/base: add helper function to redirect flags Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 16/20] net/ice/base: add helper function to aggregate flags Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 17/20] net/ice/base: add parser execution main loop Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 18/20] net/ice/base: support double VLAN mode configure for parser Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 19/20] net/ice/base: add tunnel port support " Qi Zhang
2021-09-17 11:02 ` Qi Zhang [this message]

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