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From: Xueming Li <xuemingl@nvidia.com>
To: <dev@dpdk.org>
Cc: <xuemingl@nvidia.com>, Matan Azrad <matan@nvidia.com>,
	"Viacheslav Ovsiienko" <viacheslavo@nvidia.com>
Subject: [dpdk-dev] [PATCH 5/8] net/mlx5: support flow item port of switch manager
Date: Mon, 27 Sep 2021 16:32:53 +0800	[thread overview]
Message-ID: <20210927083256.337450-6-xuemingl@nvidia.com> (raw)
In-Reply-To: <20210927083256.337450-1-xuemingl@nvidia.com>

When sending packet from representor, the vport ID in transport domain
is E-Switch manager vport ID since representor shares resources of
eswitch manager. To match packet sent by representor, pattern has to be
vport_id==<esw-mgr-id> && txq==<sqn>

On BlueField, eswitch manager ID is 0xfffe. 0 on other NIC.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow.h    |  3 +++
 drivers/net/mlx5/mlx5_flow_dv.c | 25 +++++++++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 76ad53f2a1e..861e18fb3b1 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -18,6 +18,9 @@
 
 #include "mlx5.h"
 
+/* E-Switch Manager port, used for rte_flow_item_port_id. */
+#define MLX5_PORT_ESW_MGR UINT32_MAX
+
 /* Private rte flow items. */
 enum mlx5_rte_flow_item_type {
 	MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 3f6f5dcfbad..d4242a4aa8d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -15,6 +15,7 @@
 #include <rte_flow_driver.h>
 #include <rte_malloc.h>
 #include <rte_cycles.h>
+#include <rte_bus_pci.h>
 #include <rte_ip.h>
 #include <rte_gre.h>
 #include <rte_vxlan.h>
@@ -92,6 +93,23 @@ static int
 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
 				  uint32_t rix_jump);
 
+static int16_t
+flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+
+	if (priv->pci_dev == NULL)
+		return 0;
+	switch (priv->pci_dev->id.device_id) {
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
+		return (int16_t)0xfffe;
+	default:
+		return 0;
+	}
+}
+
 /**
  * Initialize flow attributes structure according to flow items' types.
  *
@@ -2224,6 +2242,8 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 		return ret;
 	if (!spec)
 		return 0;
+	if (spec->id == MLX5_PORT_ESW_MGR)
+		return 0;
 	esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
 	if (!esw_priv)
 		return rte_flow_error_set(error, rte_errno,
@@ -9691,6 +9711,11 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
 	struct mlx5_priv *priv;
 	uint16_t mask, id;
 
+	if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
+		flow_dv_translate_item_source_vport(matcher, key,
+			flow_dv_get_esw_manager_vport_id(dev), 0xffff);
+		return 0;
+	}
 	mask = pid_m ? pid_m->id : 0xffff;
 	id = pid_v ? pid_v->id : dev->data->port_id;
 	priv = mlx5_port_to_eswitch_info(id, item == NULL);
-- 
2.33.0


  parent reply	other threads:[~2021-09-27  8:34 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-27  8:32 [dpdk-dev] [PATCH 0/8] net/mlx5: support more than 255 representors Xueming Li
2021-09-27  8:32 ` [dpdk-dev] [PATCH 1/8] common/mlx5: add netlink API to get RDMA port state Xueming Li
2021-09-27  8:32 ` [dpdk-dev] [PATCH 2/8] net/mlx5: use netlink when IB port greater than 255 Xueming Li
2021-09-27  8:32 ` [dpdk-dev] [PATCH 3/8] net/mlx5: improve Verbs flow priority discover for scalable Xueming Li
2021-09-27  8:32 ` [dpdk-dev] [PATCH 4/8] net/mlx5: check DevX to support more Verb ports Xueming Li
2021-09-27  8:32 ` Xueming Li [this message]
2021-09-27  8:32 ` [dpdk-dev] [PATCH 6/8] net/mlx5: supports flow item of normal Tx queue Xueming Li
2021-09-27  8:32 ` [dpdk-dev] [PATCH 7/8] net/mlx5: fix internal root table flow priroity Xueming Li
2021-09-27  8:32 ` [dpdk-dev] [PATCH 8/8] net/mlx5: enable DevX Tx queue creation Xueming Li
2021-10-16  8:07 ` [dpdk-dev] [PATCH v2 0/8] net/mlx5: support more than 255 representors Xueming Li
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 1/8] common/mlx5: add netlink API to get RDMA port state Xueming Li
2021-10-19  8:23     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 2/8] net/mlx5: use netlink when IB port greater than 255 Xueming Li
2021-10-19  8:24     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 3/8] net/mlx5: improve Verbs flow priority discover for scalable Xueming Li
2021-10-19  8:26     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 4/8] net/mlx5: support E-Switch manager egress traffic match Xueming Li
2021-10-19  8:26     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 5/8] net/mlx5: supports flow item of normal Tx queue Xueming Li
2021-10-19  8:27     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 6/8] net/mlx5: fix internal root table flow priroity Xueming Li
2021-10-19  8:28     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 7/8] net/mlx5: enable DevX Tx queue creation Xueming Li
2021-10-19  8:29     ` Slava Ovsiienko
2021-10-16  8:07   ` [dpdk-dev] [PATCH v2 8/8] net/mlx5: check DevX to support more Verbs ports Xueming Li
2021-10-19  8:30     ` Slava Ovsiienko
2021-10-19 10:34 ` [dpdk-dev] [PATCH v3 0/8] net/mlx5: support more than 255 representors Xueming Li
2021-10-19 10:34   ` [dpdk-dev] [PATCH v3 1/8] common/mlx5: add netlink API to get RDMA port state Xueming Li
2021-10-21 13:34     ` Ferruh Yigit
2021-10-19 10:34   ` [dpdk-dev] [PATCH v3 2/8] net/mlx5: use netlink when IB port greater than 255 Xueming Li
2021-10-19 10:34   ` [dpdk-dev] [PATCH v3 3/8] net/mlx5: improve Verbs flow priority discover for scalable Xueming Li
2021-10-19 10:34   ` [dpdk-dev] [PATCH v3 4/8] net/mlx5: support E-Switch manager egress traffic match Xueming Li
2021-10-19 10:34   ` [dpdk-dev] [PATCH v3 5/8] net/mlx5: supports flow item of normal Tx queue Xueming Li
2021-10-19 10:34   ` [dpdk-dev] [PATCH v3 6/8] net/mlx5: fix internal root table flow priroity Xueming Li
2021-10-19 10:35   ` [dpdk-dev] [PATCH v3 7/8] net/mlx5: enable DevX Tx queue creation Xueming Li
2021-10-19 10:35   ` [dpdk-dev] [PATCH v3 8/8] net/mlx5: check DevX to support more Verbs ports Xueming Li
2021-10-20 13:40   ` [dpdk-dev] [PATCH v3 0/8] net/mlx5: support more than 255 representors Raslan Darawsheh
2021-10-20 16:00     ` Xueming(Steven) Li
2021-10-22  9:11 ` [dpdk-dev] [PATCH v4 " Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 1/8] common/mlx5: add netlink API to get RDMA port state Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 2/8] net/mlx5: use netlink when IB port greater than 255 Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 3/8] net/mlx5: improve Verbs flow priority discover for scalable Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 4/8] net/mlx5: support E-Switch manager egress traffic match Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 5/8] net/mlx5: supports flow item of normal Tx queue Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 6/8] net/mlx5: fix internal root table flow priroity Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 7/8] net/mlx5: enable DevX Tx queue creation Xueming Li
2021-10-22  9:11   ` [dpdk-dev] [PATCH v4 8/8] net/mlx5: check DevX to support more Verbs ports Xueming Li

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