From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
	by inbox.dpdk.org (Postfix) with ESMTP id 40DB8A0C4D;
	Thu,  7 Oct 2021 00:06:11 +0200 (CEST)
Received: from [217.70.189.124] (localhost [127.0.0.1])
	by mails.dpdk.org (Postfix) with ESMTP id 083A141232;
	Thu,  7 Oct 2021 00:04:42 +0200 (CEST)
Received: from NAM11-BN8-obe.outbound.protection.outlook.com
 (mail-bn8nam11on2047.outbound.protection.outlook.com [40.107.236.47])
 by mails.dpdk.org (Postfix) with ESMTP id 73B5A4120B
 for <dev@dpdk.org>; Thu,  7 Oct 2021 00:04:39 +0200 (CEST)
ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;
 b=OHJ0kUULfrMLs8y1R+2PPehtfddzwFVlju7QL20NL6ew4CqNcXxcPdn+kLya24vxfPwavW7oFimNuU7zsZd8zlAOoYS0yUbwCnfNhjeAgl2O/BYUibquTkCb6ZX4pkYMOU/p9cL+p5VIwDEgqDNYsE7R89+g4HvhjAfkzGhSzH1VV2vG69DUhx/zsS4A2EMttfDfAU2CV5Zy9muhLOreJ6Ms4+ao3tqKBcnuRPtG1Cgnun1zirQZQaJZezPHWQVpdNublEqHcZOZPkuuLpUqiM0tMlaXAaSpIpZc8v6IRhwBL1EN1HOz2DGO2ncchNyh53rcxzVkJQIOhd3X6vdIoQ==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; 
 s=arcselector9901;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;
 bh=dULsS3KYTn+P8oeId/KDGmsq+lktoA+vMIv2537Dxjs=;
 b=epHVIxWx4v+Mnh5HXZgAlKzt07jJj26heW4bGDUPIQb5PgwSreAlU5wuKg7gYoBjMWM3JC6AO12OZSPP4azTGasBQAw+7MmId5c5YfWLrZ7osCdRgQgJSLTHnGWAgh7Ivi5shKjCFD1in/+FeM492PvxWx2wz2qjvlaECe6DN/BGkZgM3DjXRPAc79fH9jhRRX7P8NK43tSwiOTmq6DDH/bLq9yq+i7PEOLHLJq0440fKuwEor44fo6M5fZqAdS0jqJhBYvQkHCzPlQSEG/ALQcm6jU7MK7egwft0OJ3RiAu96cxls1e/37CB8gOepO4ThN9IQhv0k8QvOeLtTkuqA==
ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is
 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;
 dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; 
 dkim=none (message not signed); arc=none
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;
 s=selector2;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=dULsS3KYTn+P8oeId/KDGmsq+lktoA+vMIv2537Dxjs=;
 b=GXGoWlDLbMmJKYPNmACfYIpAzCHmmw8V4NTr9mESsyNGytZelC+QovJQPME1YmA+I6IBWhAhBfoGkatsEJ1/2svN+YwBoW+U2WvuiV86C6dVa6w2E6/pQSSZyCRL6l4ypnwQaoATfySPAZHj69YMxZ9RRCREP55IhM20z7gXXM2uk5/scneZC9Mp0RqcO6fgyaUTHOjpS4Zjqj+JLcyhmCNOGYh48pcKWJYsn7qVrjwLR6h3dYffgO+d2SeVnXNxW3bPvcRM0RdHCuAuXHnzru9GpgE6YnDELW1iciZBgdIrtXgg1PDXf9/3JBeGZOCTx+kujysglROjWEEy9sLOMg==
Received: from CO2PR04CA0190.namprd04.prod.outlook.com (2603:10b6:104:5::20)
 by BY5PR12MB4306.namprd12.prod.outlook.com (2603:10b6:a03:206::17) with
 Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4587.18; Wed, 6 Oct
 2021 22:04:36 +0000
Received: from CO1NAM11FT015.eop-nam11.prod.protection.outlook.com
 (2603:10b6:104:5:cafe::3a) by CO2PR04CA0190.outlook.office365.com
 (2603:10b6:104:5::20) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4566.14 via Frontend
 Transport; Wed, 6 Oct 2021 22:04:35 +0000
X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34)
 smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed)
 header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com;
Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates
 216.228.112.34 as permitted sender) receiver=protection.outlook.com;
 client-ip=216.228.112.34; helo=mail.nvidia.com;
Received: from mail.nvidia.com (216.228.112.34) by
 CO1NAM11FT015.mail.protection.outlook.com (10.13.175.130) with Microsoft SMTP
 Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id
 15.20.4587.18 via Frontend Transport; Wed, 6 Oct 2021 22:04:35 +0000
Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 6 Oct
 2021 22:04:33 +0000
From: <michaelba@nvidia.com>
To: <dev@dpdk.org>
CC: Matan Azrad <matan@nvidia.com>, Thomas Monjalon <thomas@monjalon.net>,
 Michael Baum <michaelba@oss.nvidia.com>
Date: Thu, 7 Oct 2021 01:03:46 +0300
Message-ID: <20211006220350.2357487-15-michaelba@nvidia.com>
X-Mailer: git-send-email 2.25.1
In-Reply-To: <20211006220350.2357487-1-michaelba@nvidia.com>
References: <20210930172822.1949969-1-michaelba@nvidia.com>
 <20211006220350.2357487-1-michaelba@nvidia.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
X-Originating-IP: [172.20.187.6]
X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To
 HQMAIL107.nvidia.com (172.20.187.13)
X-EOPAttributedMessage: 0
X-MS-PublicTrafficType: Email
X-MS-Office365-Filtering-Correlation-Id: 53d4dd7c-07b0-47f0-7b4c-08d9891548a0
X-MS-TrafficTypeDiagnostic: BY5PR12MB4306:
X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr
X-Microsoft-Antispam-PRVS: <BY5PR12MB43060390EED4A2C5FD1577EECCB09@BY5PR12MB4306.namprd12.prod.outlook.com>
X-MS-Oob-TLC-OOBClassifiers: OLM:3044;
X-MS-Exchange-SenderADCheck: 1
X-MS-Exchange-AntiSpam-Relay: 0
X-Microsoft-Antispam: BCL:0;
X-Microsoft-Antispam-Message-Info: Boqq3AKt30GdRO1wnKybBPX+omWP2J6qkimm46qOuhBwXLxRAcO0mGsVEAWq4i/KmLG+6K6Pj4KBZf0GJTSF9gYCK9+ebQbB/LmO7O4e16hUxYeBMXPnFZFW8aa9hvWFQ0pOaicu1auS2ObYB6PTtiFdcwYPvWDB2WKGkw5WrL/ZMytOQFWplekxCjEBZY9031JeIu2k5/JYBlRoSoHTGfEnEAaKsTy3J17b0HfvQdE8AuIccJtnI3X4D28AmN4UUHczZ7MGE3bKs98O3F0UNXZiTmo36IN8K7PrisVJDigwKovwiHeANVmua7ouC/caQ6g84c1aqigHRHlc6S2GD24f3zn3xgsgZ3f8hcFt9S2N6KjlACSr86l12psrChv+flJ0BSLQJzJkjnPrLY99UVNQngQIz1A6uM/Dp6YYsjld+hpQA7RyS8iVO/yCuF2rHwxtvSYHB2p/i0cdguejDeBhjAqbU384PMpsTZUJny0wbjdLgzoBxEWBRyeSwG8Wa/egMRGT+AiMSgeDUJumWA/vYQeo66w7H1KhbNVqHRYZ+GQqTToXrlehqxmYSwhPIm9EcxSHXOt4FXvdlll6O4KbOMl07Hh71f8uJJbM0R4MFZSyilBOpYqZ/nLAK1rRV1zLj9qNJsOPAhbOkRFOOLZnOk1F+55tN+/+FzUrjtUH2fENY1GvCvh3rkO4sR0Cnq1Q6VvRcnPvaX8JF0JDug==
X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:;
 IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;
 SFS:(4636009)(36840700001)(46966006)(7636003)(82310400003)(6916009)(6286002)(336012)(4326008)(107886003)(86362001)(186003)(2876002)(7696005)(1076003)(30864003)(2616005)(16526019)(26005)(36756003)(2906002)(54906003)(8936002)(316002)(426003)(356005)(70206006)(8676002)(36860700001)(5660300002)(47076005)(508600001)(6666004)(70586007)(55016002)(83380400001);
 DIR:OUT; SFP:1101; 
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Oct 2021 22:04:35.4361 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 53d4dd7c-07b0-47f0-7b4c-08d9891548a0
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];
 Helo=[mail.nvidia.com]
X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT015.eop-nam11.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4306
Subject: [dpdk-dev] [PATCH v2 14/18] common/mlx5: add global MR cache create
 function
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>

From: Michael Baum <michaelba@oss.nvidia.com>

Add function for global shared MR cache structure initialization.
This function include:
 - btree initialization.
 - set callbacks for reg and dereg MR.

Signed-off-by: Michael Baum <michaelba@oss.nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/common/mlx5/linux/mlx5_common_verbs.c | 15 +++++++
 drivers/common/mlx5/mlx5_common_mr.c          | 25 ++++++++++-
 drivers/common/mlx5/mlx5_common_mr.h          |  8 +++-
 drivers/common/mlx5/version.map               |  5 +--
 drivers/common/mlx5/windows/mlx5_common_os.c  | 20 ++++++++-
 drivers/common/mlx5/windows/mlx5_common_os.h  |  6 +--
 drivers/compress/mlx5/mlx5_compress.c         |  5 +--
 drivers/crypto/mlx5/mlx5_crypto.c             |  5 +--
 drivers/net/mlx5/linux/mlx5_os.c              | 17 --------
 drivers/net/mlx5/linux/mlx5_verbs.c           | 42 -------------------
 drivers/net/mlx5/linux/mlx5_verbs.h           |  2 -
 drivers/net/mlx5/mlx5.c                       |  6 +--
 drivers/net/mlx5/mlx5.h                       |  8 ----
 drivers/net/mlx5/windows/mlx5_os.c            | 17 --------
 drivers/regex/mlx5/mlx5_regex.c               |  6 +--
 15 files changed, 70 insertions(+), 117 deletions(-)

diff --git a/drivers/common/mlx5/linux/mlx5_common_verbs.c b/drivers/common/mlx5/linux/mlx5_common_verbs.c
index 519cb8d056..cf2f7ecbf3 100644
--- a/drivers/common/mlx5/linux/mlx5_common_verbs.c
+++ b/drivers/common/mlx5/linux/mlx5_common_verbs.c
@@ -142,3 +142,18 @@ mlx5_common_verbs_dereg_mr(struct mlx5_pmd_mr *pmd_mr)
 		memset(pmd_mr, 0, sizeof(*pmd_mr));
 	}
 }
+
+/**
+ * Set the reg_mr and dereg_mr callbacks.
+ *
+ * @param[out] reg_mr_cb
+ *   Pointer to reg_mr func
+ * @param[out] dereg_mr_cb
+ *   Pointer to dereg_mr func
+ */
+void
+mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb)
+{
+	*reg_mr_cb = mlx5_common_verbs_reg_mr;
+	*dereg_mr_cb = mlx5_common_verbs_dereg_mr;
+}
diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c
index 8fd65484cf..43dc3d88ce 100644
--- a/drivers/common/mlx5/mlx5_common_mr.c
+++ b/drivers/common/mlx5/mlx5_common_mr.c
@@ -199,7 +199,7 @@ mr_btree_insert(struct mlx5_mr_btree *bt, struct mr_cache_entry *entry)
  * @return
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-int
+static int
 mlx5_mr_btree_init(struct mlx5_mr_btree *bt, int n, int socket)
 {
 	if (bt == NULL) {
@@ -1044,6 +1044,29 @@ mlx5_mr_release_cache(struct mlx5_mr_share_cache *share_cache)
 	mlx5_mr_garbage_collect(share_cache);
 }
 
+/**
+ * Initialize global MR cache of a device.
+ *
+ * @param share_cache
+ *   Pointer to a global shared MR cache.
+ * @param socket
+ *   NUMA socket on which memory must be allocated.
+ *
+ * @return
+ *   0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+int
+mlx5_mr_create_cache(struct mlx5_mr_share_cache *share_cache, int socket)
+{
+	/* Set the reg_mr and dereg_mr callback functions */
+	mlx5_os_set_reg_mr_cb(&share_cache->reg_mr_cb,
+			      &share_cache->dereg_mr_cb);
+	rte_rwlock_init(&share_cache->rwlock);
+	/* Initialize B-tree and allocate memory for global MR cache table. */
+	return mlx5_mr_btree_init(&share_cache->cache,
+				  MLX5_MR_BTREE_CACHE_N * 2, socket);
+}
+
 /**
  * Flush all of the local cache entries.
  *
diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h
index 1392d9b55a..36689dfb54 100644
--- a/drivers/common/mlx5/mlx5_common_mr.h
+++ b/drivers/common/mlx5/mlx5_common_mr.h
@@ -128,8 +128,6 @@ __rte_internal
 int mlx5_mr_ctrl_init(struct mlx5_mr_ctrl *mr_ctrl, uint32_t *dev_gen_ptr,
 		      int socket);
 __rte_internal
-int mlx5_mr_btree_init(struct mlx5_mr_btree *bt, int n, int socket);
-__rte_internal
 void mlx5_mr_btree_free(struct mlx5_mr_btree *bt);
 __rte_internal
 void mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused);
@@ -145,6 +143,8 @@ uint32_t mlx5_mr_mempool2mr_bh(struct mlx5_mr_share_cache *share_cache,
 __rte_internal
 void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache);
 __rte_internal
+int mlx5_mr_create_cache(struct mlx5_mr_share_cache *share_cache, int socket);
+__rte_internal
 void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused);
 __rte_internal
 void mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache);
@@ -183,6 +183,10 @@ __rte_internal
 void
 mlx5_common_verbs_dereg_mr(struct mlx5_pmd_mr *pmd_mr);
 
+__rte_internal
+void
+mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb);
+
 __rte_internal
 void
 mlx5_mr_free(struct mlx5_mr *mr, mlx5_dereg_mr_t dereg_mr_cb);
diff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map
index 6200c013fb..abe5c12cd8 100644
--- a/drivers/common/mlx5/version.map
+++ b/drivers/common/mlx5/version.map
@@ -109,7 +109,7 @@ INTERNAL {
 	mlx5_mr_addr2mr_bh;
 	mlx5_mr_btree_dump;
 	mlx5_mr_btree_free;
-	mlx5_mr_btree_init;
+	mlx5_mr_create_cache;
 	mlx5_mr_create_primary;
     mlx5_mr_ctrl_init;
 	mlx5_mr_dump_cache;
@@ -136,10 +136,9 @@ INTERNAL {
 	mlx5_nl_vlan_vmwa_create; # WINDOWS_NO_EXPORT
 	mlx5_nl_vlan_vmwa_delete; # WINDOWS_NO_EXPORT
 
-	mlx5_os_dereg_mr;
-	mlx5_os_reg_mr;
 	mlx5_os_umem_dereg;
 	mlx5_os_umem_reg;
+    mlx5_os_set_reg_mr_cb;
 
 	mlx5_realloc;
 
diff --git a/drivers/common/mlx5/windows/mlx5_common_os.c b/drivers/common/mlx5/windows/mlx5_common_os.c
index 4d0f1e92e3..44e8ebec2b 100644
--- a/drivers/common/mlx5/windows/mlx5_common_os.c
+++ b/drivers/common/mlx5/windows/mlx5_common_os.c
@@ -317,7 +317,7 @@ mlx5_os_umem_dereg(void *pumem)
  * @return
  *   0 on successful registration, -1 otherwise
  */
-int
+static int
 mlx5_os_reg_mr(void *pd,
 	       void *addr, size_t length, struct mlx5_pmd_mr *pmd_mr)
 {
@@ -365,7 +365,7 @@ mlx5_os_reg_mr(void *pd,
  * @param[in] pmd_mr
  *  Pointer to PMD mr object
  */
-void
+static void
 mlx5_os_dereg_mr(struct mlx5_pmd_mr *pmd_mr)
 {
 	if (pmd_mr && pmd_mr->mkey)
@@ -374,3 +374,19 @@ mlx5_os_dereg_mr(struct mlx5_pmd_mr *pmd_mr)
 		claim_zero(mlx5_os_umem_dereg(pmd_mr->obj));
 	memset(pmd_mr, 0, sizeof(*pmd_mr));
 }
+
+/**
+ * Set the reg_mr and dereg_mr callbacks.
+ *
+ * @param[out] reg_mr_cb
+ *   Pointer to reg_mr func
+ * @param[out] dereg_mr_cb
+ *   Pointer to dereg_mr func
+ *
+ */
+void
+mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb)
+{
+	*reg_mr_cb = mlx5_os_reg_mr;
+	*dereg_mr_cb = mlx5_os_dereg_mr;
+}
diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h
index c99645aefd..3afce56cd9 100644
--- a/drivers/common/mlx5/windows/mlx5_common_os.h
+++ b/drivers/common/mlx5/windows/mlx5_common_os.h
@@ -253,9 +253,5 @@ __rte_internal
 void *mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access);
 __rte_internal
 int mlx5_os_umem_dereg(void *pumem);
-__rte_internal
-int mlx5_os_reg_mr(void *pd,
-		   void *addr, size_t length, struct mlx5_pmd_mr *pmd_mr);
-__rte_internal
-void mlx5_os_dereg_mr(struct mlx5_pmd_mr *pmd_mr);
+
 #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */
diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c
index 90d1684e00..bf3586a354 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -799,16 +799,13 @@ mlx5_compress_dev_probe(struct mlx5_common_device *cdev)
 		rte_compressdev_pmd_destroy(priv->compressdev);
 		return -1;
 	}
-	if (mlx5_mr_btree_init(&priv->mr_scache.cache,
-			     MLX5_MR_BTREE_CACHE_N * 2, rte_socket_id()) != 0) {
+	if (mlx5_mr_create_cache(&priv->mr_scache, rte_socket_id()) != 0) {
 		DRV_LOG(ERR, "Failed to allocate shared cache MR memory.");
 		mlx5_compress_hw_global_release(priv);
 		rte_compressdev_pmd_destroy(priv->compressdev);
 		rte_errno = ENOMEM;
 		return -rte_errno;
 	}
-	priv->mr_scache.reg_mr_cb = mlx5_common_verbs_reg_mr;
-	priv->mr_scache.dereg_mr_cb = mlx5_common_verbs_dereg_mr;
 	/* Register callback function for global shared MR cache management. */
 	if (TAILQ_EMPTY(&mlx5_compress_priv_list))
 		rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index acfb856ef8..eeb4dde9a9 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -974,16 +974,13 @@ mlx5_crypto_dev_probe(struct mlx5_common_device *cdev)
 		rte_cryptodev_pmd_destroy(priv->crypto_dev);
 		return -1;
 	}
-	if (mlx5_mr_btree_init(&priv->mr_scache.cache,
-			     MLX5_MR_BTREE_CACHE_N * 2, rte_socket_id()) != 0) {
+	if (mlx5_mr_create_cache(&priv->mr_scache, rte_socket_id()) != 0) {
 		DRV_LOG(ERR, "Failed to allocate shared cache MR memory.");
 		mlx5_crypto_hw_global_release(priv);
 		rte_cryptodev_pmd_destroy(priv->crypto_dev);
 		rte_errno = ENOMEM;
 		return -rte_errno;
 	}
-	priv->mr_scache.reg_mr_cb = mlx5_common_verbs_reg_mr;
-	priv->mr_scache.dereg_mr_cb = mlx5_common_verbs_dereg_mr;
 	priv->keytag = rte_cpu_to_be_64(devarg_prms.keytag);
 	priv->max_segs_num = devarg_prms.max_segs_num;
 	priv->umr_wqe_size = sizeof(struct mlx5_wqe_umr_bsf_seg) +
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 06bde2669c..9e445f2f9b 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -2831,23 +2831,6 @@ mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
 	return 1;
 }
 
-/**
- * Set the reg_mr and dereg_mr call backs
- *
- * @param reg_mr_cb[out]
- *   Pointer to reg_mr func
- * @param dereg_mr_cb[out]
- *   Pointer to dereg_mr func
- *
- */
-void
-mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
-		      mlx5_dereg_mr_t *dereg_mr_cb)
-{
-	*reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
-	*dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
-}
-
 /**
  * Remove a MAC address from device
  *
diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c
index fb10dd0839..4779b37aa6 100644
--- a/drivers/net/mlx5/linux/mlx5_verbs.c
+++ b/drivers/net/mlx5/linux/mlx5_verbs.c
@@ -26,48 +26,6 @@
 #include <mlx5_utils.h>
 #include <mlx5_malloc.h>
 
-/**
- * Register mr. Given protection domain pointer, pointer to addr and length
- * register the memory region.
- *
- * @param[in] pd
- *   Pointer to protection domain context.
- * @param[in] addr
- *   Pointer to memory start address.
- * @param[in] length
- *   Length of the memory to register.
- * @param[out] pmd_mr
- *   pmd_mr struct set with lkey, address, length and pointer to mr object
- *
- * @return
- *   0 on successful registration, -1 otherwise
- */
-static int
-mlx5_reg_mr(void *pd, void *addr, size_t length,
-		 struct mlx5_pmd_mr *pmd_mr)
-{
-	return mlx5_common_verbs_reg_mr(pd, addr, length, pmd_mr);
-}
-
-/**
- * Deregister mr. Given the mlx5 pmd MR - deregister the MR
- *
- * @param[in] pmd_mr
- *   pmd_mr struct set with lkey, address, length and pointer to mr object
- *
- */
-static void
-mlx5_dereg_mr(struct mlx5_pmd_mr *pmd_mr)
-{
-	mlx5_common_verbs_dereg_mr(pmd_mr);
-}
-
-/* verbs operations. */
-const struct mlx5_mr_ops mlx5_mr_verbs_ops = {
-	.reg_mr = mlx5_reg_mr,
-	.dereg_mr = mlx5_dereg_mr,
-};
-
 /**
  * Modify Rx WQ vlan stripping offload
  *
diff --git a/drivers/net/mlx5/linux/mlx5_verbs.h b/drivers/net/mlx5/linux/mlx5_verbs.h
index f7e8e2fe98..829d9fa738 100644
--- a/drivers/net/mlx5/linux/mlx5_verbs.h
+++ b/drivers/net/mlx5/linux/mlx5_verbs.h
@@ -12,7 +12,5 @@ void mlx5_txq_ibv_obj_release(struct mlx5_txq_obj *txq_obj);
 int mlx5_rxq_ibv_obj_dummy_lb_create(struct rte_eth_dev *dev);
 void mlx5_rxq_ibv_obj_dummy_lb_release(struct rte_eth_dev *dev);
 
-/* Verbs ops struct */
-extern const struct mlx5_mr_ops mlx5_mr_verbs_ops;
 extern struct mlx5_obj_ops ibv_obj_ops;
 #endif /* RTE_PMD_MLX5_VERBS_H_ */
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 788c701292..a6c196b368 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1351,15 +1351,11 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
 	 * At this point the device is not added to the memory
 	 * event list yet, context is just being created.
 	 */
-	err = mlx5_mr_btree_init(&sh->share_cache.cache,
-				 MLX5_MR_BTREE_CACHE_N * 2,
-				 sh->numa_node);
+	err = mlx5_mr_create_cache(&sh->share_cache, sh->numa_node);
 	if (err) {
 		err = rte_errno;
 		goto error;
 	}
-	mlx5_os_set_reg_mr_cb(&sh->share_cache.reg_mr_cb,
-			      &sh->share_cache.dereg_mr_cb);
 	mlx5_os_dev_shared_handler_install(sh);
 	sh->cnt_id_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_DWORD);
 	if (!sh->cnt_id_tbl) {
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 96e2cbc644..5c25b94f36 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1363,12 +1363,6 @@ struct mlx5_obj_ops {
 
 #define MLX5_RSS_HASH_FIELDS_LEN RTE_DIM(mlx5_rss_hash_fields)
 
-/* MR operations structure. */
-struct mlx5_mr_ops {
-	mlx5_reg_mr_t reg_mr;
-	mlx5_dereg_mr_t dereg_mr;
-};
-
 struct mlx5_priv {
 	struct rte_eth_dev_data *dev_data;  /* Pointer to device data. */
 	struct mlx5_dev_ctx_shared *sh; /* Shared device context. */
@@ -1768,8 +1762,6 @@ void mlx5_os_free_shared_dr(struct mlx5_priv *priv);
 int mlx5_os_net_probe(struct mlx5_common_device *cdev);
 void mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh);
 void mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh);
-void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
-			   mlx5_dereg_mr_t *dereg_mr_cb);
 void mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);
 int mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
 			 uint32_t index);
diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c
index 3477f018c1..c3d4b90946 100644
--- a/drivers/net/mlx5/windows/mlx5_os.c
+++ b/drivers/net/mlx5/windows/mlx5_os.c
@@ -926,21 +926,4 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)
 	return 0;
 }
 
-/**
- * Set the reg_mr and dereg_mr call backs
- *
- * @param reg_mr_cb[out]
- *   Pointer to reg_mr func
- * @param dereg_mr_cb[out]
- *   Pointer to dereg_mr func
- *
- */
-void
-mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
-		      mlx5_dereg_mr_t *dereg_mr_cb)
-{
-	*reg_mr_cb = mlx5_os_reg_mr;
-	*dereg_mr_cb = mlx5_os_dereg_mr;
-}
-
 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};
diff --git a/drivers/regex/mlx5/mlx5_regex.c b/drivers/regex/mlx5/mlx5_regex.c
index 91fb931062..b39181ebb5 100644
--- a/drivers/regex/mlx5/mlx5_regex.c
+++ b/drivers/regex/mlx5/mlx5_regex.c
@@ -194,11 +194,7 @@ mlx5_regex_dev_probe(struct mlx5_common_device *cdev)
 	priv->regexdev->device = cdev->dev;
 	priv->regexdev->data->dev_private = priv;
 	priv->regexdev->state = RTE_REGEXDEV_READY;
-	priv->mr_scache.reg_mr_cb = mlx5_common_verbs_reg_mr;
-	priv->mr_scache.dereg_mr_cb = mlx5_common_verbs_dereg_mr;
-	ret = mlx5_mr_btree_init(&priv->mr_scache.cache,
-				 MLX5_MR_BTREE_CACHE_N * 2,
-				 rte_socket_id());
+	ret = mlx5_mr_create_cache(&priv->mr_scache, rte_socket_id());
 	if (ret) {
 		DRV_LOG(ERR, "MR init tree failed.");
 	    rte_errno = ENOMEM;
-- 
2.25.1