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From: <michaelba@nvidia.com>
To: <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
	Thomas Monjalon <thomas@monjalon.net>,
	Michael Baum <michaelba@oss.nvidia.com>
Subject: [dpdk-dev] [PATCH v2 07/18] net/mlx5: remove redundant flag in device config
Date: Thu, 7 Oct 2021 01:03:39 +0300	[thread overview]
Message-ID: <20211006220350.2357487-8-michaelba@nvidia.com> (raw)
In-Reply-To: <20211006220350.2357487-1-michaelba@nvidia.com>

From: Michael Baum <michaelba@oss.nvidia.com>

Device configure structure has flag named devx as same as SH structure
with the same meaning.

Remove the flag from the configuration structure and move all the
usages to the SH flag.

Signed-off-by: Michael Baum <michaelba@oss.nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_os.c   | 15 +++++++--------
 drivers/net/mlx5/mlx5.h            |  1 -
 drivers/net/mlx5/mlx5_flow_dv.c    | 18 +++++++++---------
 drivers/net/mlx5/mlx5_trigger.c    |  2 +-
 drivers/net/mlx5/windows/mlx5_os.c |  9 ++++-----
 5 files changed, 21 insertions(+), 24 deletions(-)

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index c1b828a422..07ba0ff43b 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -718,7 +718,7 @@ mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 	fallback = true;
 #else
 	fallback = false;
-	if (!priv->config.devx || !priv->config.dv_flow_en ||
+	if (!sh->devx || !priv->config.dv_flow_en ||
 	    !priv->config.hca_attr.flow_counters_dump ||
 	    !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 	    (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
@@ -1025,7 +1025,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 	if (!sh)
 		return NULL;
-	config->devx = sh->devx;
 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 	config->dest_tir = 1;
 #endif
@@ -1325,7 +1324,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
 		config->mps == MLX5_MPW ? "legacy " : "",
 		config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
-	if (config->devx) {
+	if (sh->devx) {
 		err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
 		if (err) {
 			err = -err;
@@ -1468,13 +1467,13 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		config->cqe_comp = 0;
 	}
 	if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
-	    (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
+	    (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
 		DRV_LOG(WARNING, "Flow Tag CQE compression"
 				 " format isn't supported.");
 		config->cqe_comp = 0;
 	}
 	if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
-	    (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
+	    (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
 		DRV_LOG(WARNING, "L3/L4 Header CQE compression"
 				 " format isn't supported.");
 		config->cqe_comp = 0;
@@ -1497,7 +1496,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 			config->hca_attr.log_max_static_sq_wq);
 		DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
 			config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
-		if (!config->devx) {
+		if (!sh->devx) {
 			DRV_LOG(ERR, "DevX is required for packet pacing");
 			err = ENODEV;
 			goto error;
@@ -1544,7 +1543,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		goto error;
 #endif
 	}
-	if (config->devx) {
+	if (sh->devx) {
 		uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
 
 		err = config->hca_attr.access_register_user ?
@@ -1722,7 +1721,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		if (err)
 			goto error;
 	}
-	if (config->devx && config->dv_flow_en && config->dest_tir) {
+	if (sh->devx && config->dv_flow_en && config->dest_tir) {
 		priv->obj_ops = devx_obj_ops;
 		priv->obj_ops.drop_action_create =
 						ibv_obj_ops.drop_action_create;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index becd8722de..d2eabe04a5 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -265,7 +265,6 @@ struct mlx5_dev_config {
 	unsigned int lacp_by_user:1;
 	/* Enable user to manage LACP traffic. */
 	unsigned int swp:1; /* Tx generic tunnel checksum and TSO offload. */
-	unsigned int devx:1; /* Whether devx interface is available or not. */
 	unsigned int dest_tir:1; /* Whether advanced DR API is available. */
 	unsigned int reclaim_mode:2; /* Memory reclaim mode. */
 	unsigned int rt_timestamp:1; /* realtime timestamp format. */
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index c6370cd1d6..de994c602b 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -3350,7 +3350,7 @@ flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
 
-	if (!priv->config.devx)
+	if (!priv->sh->devx)
 		goto notsup_err;
 	if (action_flags & MLX5_FLOW_ACTION_COUNT)
 		return rte_flow_error_set(error, EINVAL,
@@ -5297,7 +5297,7 @@ flow_dv_validate_action_age(uint64_t action_flags,
 	struct mlx5_priv *priv = dev->data->dev_private;
 	const struct rte_flow_action_age *age = action->conf;
 
-	if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
+	if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
 	    !priv->sh->aso_age_mng))
 		return rte_flow_error_set(error, ENOTSUP,
 					  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
@@ -5582,7 +5582,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
 		return rte_flow_error_set(error, EINVAL,
 					  RTE_FLOW_ERROR_TYPE_ACTION, action,
 					  "ratio value starts from 1");
-	if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
+	if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
 		return rte_flow_error_set(error, ENOTSUP,
 					  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 					  NULL,
@@ -6166,7 +6166,7 @@ flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
 			age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
 	uint32_t cnt_idx;
 
-	if (!priv->config.devx) {
+	if (!priv->sh->devx) {
 		rte_errno = ENOTSUP;
 		return 0;
 	}
@@ -6553,7 +6553,7 @@ flow_dv_mtr_alloc(struct rte_eth_dev *dev)
 	struct mlx5_aso_mtr_pool *pool;
 	uint32_t mtr_idx = 0;
 
-	if (!priv->config.devx) {
+	if (!priv->sh->devx) {
 		rte_errno = ENOTSUP;
 		return 0;
 	}
@@ -12438,7 +12438,7 @@ flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
 	uint32_t ct_idx;
 
 	MLX5_ASSERT(mng);
-	if (!priv->config.devx) {
+	if (!priv->sh->devx) {
 		rte_errno = ENOTSUP;
 		return 0;
 	}
@@ -12874,7 +12874,7 @@ flow_dv_translate(struct rte_eth_dev *dev,
 			}
 			break;
 		case RTE_FLOW_ACTION_TYPE_COUNT:
-			if (!dev_conf->devx) {
+			if (!priv->sh->devx) {
 				return rte_flow_error_set
 					      (error, ENOTSUP,
 					       RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
@@ -15718,7 +15718,7 @@ flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
 	struct mlx5_priv *priv = dev->data->dev_private;
 	struct rte_flow_query_count *qc = data;
 
-	if (!priv->config.devx)
+	if (!priv->sh->devx)
 		return rte_flow_error_set(error, ENOTSUP,
 					  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 					  NULL,
@@ -17331,7 +17331,7 @@ flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
 	uint64_t inn_pkts, inn_bytes;
 	int ret;
 
-	if (!priv->config.devx)
+	if (!priv->sh->devx)
 		return -1;
 
 	ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index 3cbf5816a1..e93647aafd 100644
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -1112,7 +1112,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
 			dev->data->port_id, strerror(rte_errno));
 		goto error;
 	}
-	if ((priv->config.devx && priv->config.dv_flow_en &&
+	if ((priv->sh->devx && priv->config.dv_flow_en &&
 	    priv->config.dest_tir) && priv->obj_ops.lb_dummy_queue_create) {
 		ret = priv->obj_ops.lb_dummy_queue_create(dev);
 		if (ret)
diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c
index 1e76f63fc1..a882a18439 100644
--- a/drivers/net/mlx5/windows/mlx5_os.c
+++ b/drivers/net/mlx5/windows/mlx5_os.c
@@ -272,7 +272,7 @@ mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 	fallback = true;
 #else
 	fallback = false;
-	if (!priv->config.devx || !priv->config.dv_flow_en ||
+	if (!sh->devx || !priv->config.dv_flow_en ||
 	    !priv->config.hca_attr.flow_counters_dump ||
 	    !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 	    (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
@@ -349,7 +349,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 	if (!sh)
 		return NULL;
-	config->devx = sh->devx;
 	/* Initialize the shutdown event in mlx5_dev_spawn to
 	 * support mlx5_is_removed for Windows.
 	 */
@@ -452,7 +451,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
 		config->cqe_comp = 0;
 	}
-	if (config->devx) {
+	if (sh->devx) {
 		err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
 		if (err) {
 			err = -err;
@@ -471,7 +470,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 		    (config->hw_csum ? "" : "not "));
 	}
-	if (config->devx) {
+	if (sh->devx) {
 		uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
 
 		err = config->hca_attr.access_register_user ?
@@ -642,7 +641,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 			goto error;
 		}
 	}
-	if (config->devx && config->dv_flow_en) {
+	if (sh->devx && config->dv_flow_en) {
 		priv->obj_ops = devx_obj_ops;
 	} else {
 		DRV_LOG(ERR, "Flow mode %u is not supported "
-- 
2.25.1


  parent reply	other threads:[~2021-10-06 22:05 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30 17:28 [dpdk-dev] [PATCH 00/18] mlx5: sharing global MR cache between drivers michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 01/18] net/mlx5/windows: fix miss callback register for mem event michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 02/18] common/mlx5: share basic probing with the internal drivers michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 03/18] common/mlx5: share common definitions michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 04/18] common/mlx5: share memory related devargs michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 05/18] net/mlx5/windows: rearrange probing code michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 06/18] common/mlx5: move basic probing functions to common michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 07/18] net/mlx5: remove redundant flag in device config michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 08/18] common/mlx5: share device context object michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 09/18] common/mlx5: add ROCE disable in context device creation michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 10/18] common/mlx5: share the protection domain object michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 11/18] common/mlx5: share the HCA capabilities handle michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 12/18] net/mlx5: remove redundancy in MR file michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 13/18] common/mlx5: add MR ctrl init function michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 14/18] common/mlx5: add global MR cache create function michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 15/18] common/mlx5: share MR top-half search function michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 16/18] common/mlx5: share MR management michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 17/18] common/mlx5: support device DMA map and unmap michaelba
2021-09-30 17:28 ` [dpdk-dev] [PATCH 18/18] common/mlx5: share MR mempool registration michaelba
2021-10-06 22:03 ` [dpdk-dev] [PATCH v2 00/18] mlx5: sharing global MR cache between drivers michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 01/18] net/mlx5/windows: fix miss callback register for mem event michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 02/18] common/mlx5: share basic probing with the internal drivers michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 03/18] common/mlx5: share common definitions michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 04/18] common/mlx5: share memory related devargs michaelba
2021-10-19 16:54     ` Thomas Monjalon
2021-10-19 20:49       ` Michael Baum
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 05/18] net/mlx5/windows: rearrange probing code michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 06/18] common/mlx5: move basic probing functions to common michaelba
2021-10-06 22:03   ` michaelba [this message]
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 08/18] common/mlx5: share device context object michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 09/18] common/mlx5: add ROCE disable in context device creation michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 10/18] common/mlx5: share the protection domain object michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 11/18] common/mlx5: share the HCA capabilities handle michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 12/18] net/mlx5: remove redundancy in MR file michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 13/18] common/mlx5: add MR ctrl init function michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 14/18] common/mlx5: add global MR cache create function michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 15/18] common/mlx5: share MR top-half search function michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 16/18] common/mlx5: share MR management michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 17/18] common/mlx5: support device DMA map and unmap michaelba
2021-10-06 22:03   ` [dpdk-dev] [PATCH v2 18/18] common/mlx5: share MR mempool registration michaelba
2021-10-19 20:55   ` [dpdk-dev] [PATCH v3 00/18] mlx5: sharing global MR cache between drivers michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 01/18] net/mlx5/windows: fix miss callback register for mem event michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 02/18] common/mlx5: share basic probing with the internal drivers michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 03/18] common/mlx5: share common definitions michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 04/18] common/mlx5: share memory related devargs michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 05/18] net/mlx5/windows: rearrange probing code michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 06/18] common/mlx5: move basic probing functions to common michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 07/18] net/mlx5: remove redundant flag in device config michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 08/18] common/mlx5: share device context object michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 09/18] common/mlx5: add ROCE disable in context device creation michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 10/18] common/mlx5: share the protection domain object michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 11/18] common/mlx5: share the HCA capabilities handle michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 12/18] net/mlx5: remove redundancy in MR file michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 13/18] common/mlx5: add MR ctrl init function michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 14/18] common/mlx5: add global MR cache create function michaelba
2021-10-19 20:55     ` [dpdk-dev] [PATCH v3 15/18] common/mlx5: share MR top-half search function michaelba
2021-10-19 20:56     ` [dpdk-dev] [PATCH v3 16/18] common/mlx5: share MR management michaelba
2021-10-19 20:56     ` [dpdk-dev] [PATCH v3 17/18] common/mlx5: support device DMA map and unmap michaelba
2021-10-19 20:56     ` [dpdk-dev] [PATCH v3 18/18] common/mlx5: share MR mempool registration michaelba
2021-10-21 14:26     ` [dpdk-dev] [PATCH v3 00/18] mlx5: sharing global MR cache between drivers Thomas Monjalon

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