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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT021.mail.protection.outlook.com (10.13.173.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4649.14 via Frontend Transport; Mon, 1 Nov 2021 06:38:58 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 1 Nov 2021 06:38:56 +0000 From: Lior Margalit To: Matan Azrad CC: Lior Margalit , , Date: Mon, 1 Nov 2021 08:38:41 +0200 Message-ID: <20211101063841.819001-1-lmargalit@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 68a3c92a-4898-4be2-6950-08d99d0248a4 X-MS-TrafficTypeDiagnostic: BN8PR12MB3634: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(356005)(36860700001)(86362001)(47076005)(1076003)(7636003)(82310400003)(426003)(4326008)(450100002)(2616005)(6666004)(83380400001)(8676002)(70586007)(26005)(70206006)(336012)(55016002)(2906002)(7696005)(6862004)(6636002)(6286002)(186003)(8936002)(54906003)(37006003)(36756003)(16526019)(316002)(36906005)(508600001)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2021 06:38:58.2706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 68a3c92a-4898-4be2-6950-08d99d0248a4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3634 Subject: [dpdk-dev] [PATCH v1] net/mlx5: fix RSS expansion of ETH item with EtherType X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The RSS expansion algorithm is using a graph to find the possible expansion paths. A graph node with the 'explicit' flag will be skipped, if it is not found in the flow pattern. The current implementation misses a check for the explicit flag when expanding the pattern according to ETH item with EtherType. For example: testpmd> flow create 0 ingress pattern eth / ipv6 / udp / vxlan / eth type is 2048 / end actions rss level 2 types udp end / end The "eth type is 2048" item in the pattern may be expanded to "ETH IPv4". The ETH node in the expansion graph is followed by VLAN node marked as explicit. The fix is to skip the VLAN node and continue the expansion with its next nodes, IPv4 and IPv6. The expansion paths for the above example will be: ETH IPV6 UDP VXLAN ETH END ETH IPV6 UDP VXLAN ETH IPV4 UDP END Fixes: 69d268b4fff3 ("net/mlx5: fix RSS expansion for explicit graph node") Cc: stable@dpdk.org Signed-off-by: Lior Margalit Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 5d19ef1e82..6f32c08b5f 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -391,13 +391,20 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { next = NULL; missed = 1; - for (i = 0; node->next && node->next[i]; ++i) { + i = 0; + while (node->next && node->next[i]) { next = &graph[node->next[i]]; if (next->type == missed_item.type) { flow_items[0].type = missed_item.type; flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; break; } + if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) { + node = next; + i = 0; + } else { + ++i; + } next = NULL; } } @@ -9556,17 +9563,21 @@ mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern, const struct mlx5_flow_expand_node *node) { const struct rte_flow_item *item = pattern + item_idx, *prev_item; - switch (item->type) { - case RTE_FLOW_ITEM_TYPE_VXLAN: + + if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN && + node != NULL && + node->type == RTE_FLOW_ITEM_TYPE_VXLAN) { + /* + * The expansion node is VXLAN and it is also the last + * expandable item in the pattern, so need to continue + * expansion of the inner tunnel. + */ MLX5_ASSERT(item_idx > 0); prev_item = pattern + item_idx - 1; MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP); if (mlx5_flow_is_std_vxlan_port(prev_item)) return &graph[MLX5_EXPANSION_STD_VXLAN]; - else - return &graph[MLX5_EXPANSION_L3_VXLAN]; - break; - default: - return node; + return &graph[MLX5_EXPANSION_L3_VXLAN]; } + return node; } -- 2.25.1