From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: <jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
"Kiran Kumar K" <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>
Cc: <dev@dpdk.org>, Srujana Challa <schalla@marvell.com>
Subject: [dpdk-dev] [PATCH 2/9] common/cnxk: add CPT CTX sync mailbox API
Date: Tue, 2 Nov 2021 21:24:13 +0530 [thread overview]
Message-ID: <20211102155421.486-2-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20211102155421.486-1-ndabilpuram@marvell.com>
From: Srujana Challa <schalla@marvell.com>
Add CPT CTX sync mailbox API and flush IPsec inbound entries
at application exit.
Signed-off-by: Srujana Challa <schalla@marvell.com>
---
drivers/common/cnxk/roc_mbox.h | 1 +
drivers/common/cnxk/roc_nix.c | 14 ++++++++++++++
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_inl.c | 3 +++
drivers/common/cnxk/roc_nix_inl_dev.c | 16 ++++++++++++++++
drivers/common/cnxk/version.map | 1 +
6 files changed, 36 insertions(+)
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index 22f6ebc..5dcb445 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -143,6 +143,7 @@ struct mbox_msghdr {
M(CPT_STATS, 0xA05, cpt_sts_get, cpt_sts_req, cpt_sts_rsp) \
M(CPT_RXC_TIME_CFG, 0xA06, cpt_rxc_time_cfg, cpt_rxc_time_cfg_req, \
msg_rsp) \
+ M(CPT_CTX_CACHE_SYNC, 0xA07, cpt_ctx_cache_sync, msg_req, msg_rsp) \
M(CPT_RX_INLINE_LF_CFG, 0xBFE, cpt_rx_inline_lf_cfg, \
cpt_rx_inline_lf_cfg_msg, msg_rsp) \
M(CPT_GET_CAPS, 0xBFD, cpt_caps_get, msg_req, cpt_caps_rsp_msg) \
diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c
index 64156ce..949be80 100644
--- a/drivers/common/cnxk/roc_nix.c
+++ b/drivers/common/cnxk/roc_nix.c
@@ -109,6 +109,20 @@ roc_nix_lf_inl_ipsec_cfg(struct roc_nix *roc_nix, struct roc_nix_ipsec_cfg *cfg,
}
int
+roc_nix_cpt_ctx_cache_sync(struct roc_nix *roc_nix)
+{
+ struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ struct mbox *mbox = (&nix->dev)->mbox;
+ struct msg_req *req;
+
+ req = mbox_alloc_msg_cpt_ctx_cache_sync(mbox);
+ if (req == NULL)
+ return -ENOSPC;
+
+ return mbox_process(mbox);
+}
+
+int
roc_nix_max_pkt_len(struct roc_nix *roc_nix)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 343bb2f..d83a9b5 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -437,6 +437,7 @@ int __roc_api roc_nix_lf_alloc(struct roc_nix *roc_nix, uint32_t nb_rxq,
int __roc_api roc_nix_lf_free(struct roc_nix *roc_nix);
int __roc_api roc_nix_lf_inl_ipsec_cfg(struct roc_nix *roc_nix,
struct roc_nix_ipsec_cfg *cfg, bool enb);
+int __roc_api roc_nix_cpt_ctx_cache_sync(struct roc_nix *roc_nix);
/* Debug */
int __roc_api roc_nix_lf_get_reg_count(struct roc_nix *roc_nix);
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index 3955d9b..f0fc690 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -258,6 +258,9 @@ roc_nix_inl_inb_fini(struct roc_nix *roc_nix)
nix->inl_inb_ena = false;
+ /* Flush Inbound CTX cache entries */
+ roc_nix_cpt_ctx_cache_sync(roc_nix);
+
/* Disable Inbound SA */
return nix_inl_sa_tbl_release(roc_nix);
}
diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c
index 33a59f6..a0fe6ec 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev.c
@@ -97,6 +97,19 @@ nix_inl_selftest(void)
}
static int
+nix_inl_cpt_ctx_cache_sync(struct nix_inl_dev *inl_dev)
+{
+ struct mbox *mbox = (&inl_dev->dev)->mbox;
+ struct msg_req *req;
+
+ req = mbox_alloc_msg_cpt_ctx_cache_sync(mbox);
+ if (req == NULL)
+ return -ENOSPC;
+
+ return mbox_process(mbox);
+}
+
+static int
nix_inl_nix_ipsec_cfg(struct nix_inl_dev *inl_dev, bool ena)
{
struct nix_inline_ipsec_lf_cfg *lf_cfg;
@@ -628,6 +641,9 @@ roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev)
inl_dev = idev->nix_inl_dev;
pci_dev = inl_dev->pci_dev;
+ /* Flush Inbound CTX cache entries */
+ nix_inl_cpt_ctx_cache_sync(inl_dev);
+
/* Release SSO */
rc = nix_inl_sso_release(inl_dev);
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index c2333a5..a90e5fc 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -149,6 +149,7 @@ INTERNAL {
roc_nix_inl_ctx_write;
roc_nix_inl_inb_sa_init;
roc_nix_inl_outb_sa_init;
+ roc_nix_cpt_ctx_cache_sync;
roc_nix_is_lbk;
roc_nix_is_pf;
roc_nix_is_sdp;
--
2.8.4
next prev parent reply other threads:[~2021-11-02 15:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-02 15:54 [dpdk-dev] [PATCH 1/9] common/cnxk: add code to write CPT CTX through microcode op Nithin Dabilpuram
2021-11-02 15:54 ` Nithin Dabilpuram [this message]
2021-11-02 15:54 ` [dpdk-dev] [PATCH 3/9] common/cnxk: support flow control on LBK Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 4/9] common/cnxk: enable tm to listen on Rx pause frames Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 5/9] common/cnxk: enable bp on CPT with inline inbound Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 6/9] common/cnxk: support changing drop re flag after lf alloc Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 7/9] net/cnxk: write CPT CTX through microcode op Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 8/9] net/cnxk: allow fc on lbk and enable tm bp on Rx pause Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 9/9] event/cnxk: disable drop re on vector enable for cn10k a0 Nithin Dabilpuram
2021-11-03 15:09 ` [dpdk-dev] [PATCH 1/9] common/cnxk: add code to write CPT CTX through microcode op Jerin Jacob
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