From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1FF8CA0C4E; Tue, 2 Nov 2021 16:55:29 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1929E426D7; Tue, 2 Nov 2021 16:54:52 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8F2AA426D7 for ; Tue, 2 Nov 2021 16:54:50 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1A2CjiIP030527 for ; Tue, 2 Nov 2021 08:54:49 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=HJyVNnGBmrcvqy914xs46kJH5PWFbdi6VBfsMTpHuZo=; b=JA6npze10VaxiWXEo4oVY7XfLTgNDNRYhnQokrjO5wvnpX2XfL6c95cCTkmQeGhT86Zl 7YJ3dpPukGSZ2MikwXtjyzmWhnFQPJHtr5pegDRS6ganphH0TaqTXFD0W2NlFTEsiS2M 2hJ11DNytpxhtcrsNmBxjAb/kLajpqksH1I5MjNxiriSv/08q2+24bpecvN8gFY3cXJ/ BIqFY32icE5Uz47lZVCEqFGKXPodjs4wrOuIZ1A69bdf3UM9jdzUaFY8Ri4UdGKDDe3/ TlzPKG/nBVT6hqO3TPP2LTn7u1dChyNLgnwoUQ26FPTtYNZsSci0d4//iNo3t3NRu7sg Ng== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3c35mbh5pn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 02 Nov 2021 08:54:49 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 2 Nov 2021 08:54:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 2 Nov 2021 08:54:48 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 72D135B6932; Tue, 2 Nov 2021 08:54:46 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Date: Tue, 2 Nov 2021 21:24:19 +0530 Message-ID: <20211102155421.486-8-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20211102155421.486-1-ndabilpuram@marvell.com> References: <20211102155421.486-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: sk6DDXBqVY9IAu8YHI0XWp_Mgw1wEjYm X-Proofpoint-ORIG-GUID: sk6DDXBqVY9IAu8YHI0XWp_Mgw1wEjYm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-02_08,2021-11-02_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 8/9] net/cnxk: allow fc on lbk and enable tm bp on Rx pause X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Allow flow control on LBK VF's and enable TM to listen on backpressure when Rx pause is enabled. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cnxk_ethdev.c | 12 ++++++------ drivers/net/cnxk/cnxk_ethdev_ops.c | 14 +++++++++++++- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 5059fca..a62ded6 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -332,7 +332,7 @@ nix_update_flow_ctrl_config(struct rte_eth_dev *eth_dev) struct cnxk_fc_cfg *fc = &dev->fc_cfg; struct rte_eth_fc_conf fc_cfg = {0}; - if (roc_nix_is_vf_or_sdp(&dev->nix)) + if (roc_nix_is_vf_or_sdp(&dev->nix) && !roc_nix_is_lbk(&dev->nix)) return 0; fc_cfg.mode = fc->mode; @@ -1233,6 +1233,11 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) goto cq_fini; } + /* Setup Inline security support */ + rc = nix_security_setup(dev); + if (rc) + goto cq_fini; + /* Init flow control configuration */ fc_cfg.type = ROC_NIX_FC_RXCHAN_CFG; fc_cfg.rxchan_cfg.enable = true; @@ -1249,11 +1254,6 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) goto cq_fini; } - /* Setup Inline security support */ - rc = nix_security_setup(dev); - if (rc) - goto cq_fini; - /* * Restore queue config when reconfigure followed by * reconfigure and no queue configure invoked from application case. diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index baa474f..7b3ee75 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -250,7 +250,7 @@ cnxk_nix_flow_ctrl_set(struct rte_eth_dev *eth_dev, uint8_t rx_pause, tx_pause; int rc, i; - if (roc_nix_is_vf_or_sdp(nix)) { + if (roc_nix_is_vf_or_sdp(nix) && !roc_nix_is_lbk(nix)) { plt_err("Flow control configuration is not allowed on VFs"); return -ENOTSUP; } @@ -287,6 +287,18 @@ cnxk_nix_flow_ctrl_set(struct rte_eth_dev *eth_dev, } } + /* Check if RX pause frame is enabled or not */ + if (fc->rx_pause ^ rx_pause) { + struct roc_nix_fc_cfg fc_cfg; + + memset(&fc_cfg, 0, sizeof(struct roc_nix_fc_cfg)); + fc_cfg.type = ROC_NIX_FC_TM_CFG; + fc_cfg.tm_cfg.enable = !!rx_pause; + rc = roc_nix_fc_config_set(nix, &fc_cfg); + if (rc) + return rc; + } + rc = roc_nix_fc_mode_set(nix, mode_map[fc_conf->mode]); if (rc) return rc; -- 2.8.4