From: Vidya Sagar Velumuri <vvelumuri@marvell.com>
To: <adwivedi@marvell.com>, <anoobj@marvell.com>,
<ktejasree@marvell.com>, <ndabilpuram@marvell.com>,
<gakhil@marvell.com>, <roy.fan.zhang@intel.com>
Cc: <dev@dpdk.org>, <vvelumuri@marvell.com>
Subject: [dpdk-dev] [PATCH v1 1/2] common/cnxk: fix: use appropriate zuc constants
Date: Wed, 3 Nov 2021 11:22:09 +0000 [thread overview]
Message-ID: <20211103112210.32650-1-vvelumuri@marvell.com> (raw)
Use appropriate ZUC constants based on key length and mac length
Fixes: a90db80d7d72 ("common/cnxk: set key length for PDCP algos")
Cc: vvelumuri@marvell.com
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Change-Id: Ie982110035916d2168cc4e79b7f5145c6d6ac021
diff --git a/drivers/common/cnxk/roc_se.c b/drivers/common/cnxk/roc_se.c
index 4edbc8e547..e81a0c9ecb 100644
--- a/drivers/common/cnxk/roc_se.c
+++ b/drivers/common/cnxk/roc_se.c
@@ -4,10 +4,26 @@
#include "roc_api.h"
-static uint8_t zuc_d[32] = {0x44, 0xD7, 0x26, 0xBC, 0x62, 0x6B, 0x13, 0x5E,
- 0x57, 0x89, 0x35, 0xE2, 0x71, 0x35, 0x09, 0xAF,
- 0x4D, 0x78, 0x2F, 0x13, 0x6B, 0xC4, 0x1A, 0xF1,
- 0x5E, 0x26, 0x3C, 0x4D, 0x78, 0x9A, 0x47, 0xAC};
+static uint8_t zuc_key128[32] = {
+ 0x44, 0xD7, 0x26, 0xBC, 0x62, 0x6B, 0x13, 0x5E, 0x57, 0x89, 0x35,
+ 0xE2, 0x71, 0x35, 0x09, 0xAF, 0x4D, 0x78, 0x2F, 0x13, 0x6B, 0xC4,
+ 0x1A, 0xF1, 0x5E, 0x26, 0x3C, 0x4D, 0x78, 0x9A, 0x47, 0xAC};
+
+static uint8_t zuc_key256[16] = {0x22, 0x2f, 0x24, 0x2a, 0x6d, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x52, 0x10, 0x30};
+
+static uint8_t zuc_key256_mac4[16] = {0x22, 0x2f, 0x25, 0x2a, 0x6d, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x52, 0x10, 0x30};
+
+static uint8_t zuc_key256_mac8[16] = {0x23, 0x2f, 0x24, 0x2a, 0x6d, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x52, 0x10, 0x30};
+
+static uint8_t zuc_key256_mac16[16] = {0x23, 0x2f, 0x25, 0x2a, 0x6d, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x52, 0x10, 0x30};
static inline void
cpt_snow3g_key_gen(const uint8_t *ck, uint32_t *keyx)
@@ -185,6 +201,28 @@ cpt_pdcp_mac_len_set(struct roc_se_zuc_snow3g_ctx *zs_ctx, uint16_t mac_len)
return 0;
}
+static void
+cpt_pdcp_update_zuc_const(uint8_t *zuc_const, int key_len, int mac_len)
+{
+ if (key_len == 16) {
+ memcpy(zuc_const, zuc_key128, 32);
+ } else if (key_len == 32) {
+ switch (mac_len) {
+ case 4:
+ memcpy(zuc_const, zuc_key256_mac4, 16);
+ break;
+ case 8:
+ memcpy(zuc_const, zuc_key256_mac8, 16);
+ break;
+ case 16:
+ memcpy(zuc_const, zuc_key256_mac16, 16);
+ break;
+ default:
+ plt_err("Unsupported mac len");
+ }
+ }
+}
+
int
roc_se_auth_key_set(struct roc_se_ctx *se_ctx, roc_se_auth_type type,
const uint8_t *key, uint16_t key_len, uint16_t mac_len)
@@ -245,7 +283,7 @@ roc_se_auth_key_set(struct roc_se_ctx *se_ctx, roc_se_auth_type type,
return ret;
se_ctx->pdcp_alg_type = ROC_SE_PDCP_ALG_TYPE_ZUC;
memcpy(ci_key, key, key_len);
- memcpy(zuc_const, zuc_d, 32);
+ cpt_pdcp_update_zuc_const(zuc_const, key_len, mac_len);
se_ctx->fc_type = ROC_SE_PDCP;
se_ctx->zsk_flags = 0x1;
break;
@@ -421,7 +459,11 @@ roc_se_ciph_key_set(struct roc_se_ctx *se_ctx, roc_se_cipher_type type,
zs_ctx->zuc.otk_ctx.w0.s.alg_type = ROC_SE_PDCP_ALG_TYPE_ZUC;
se_ctx->pdcp_alg_type = ROC_SE_PDCP_ALG_TYPE_ZUC;
memcpy(ci_key, key, key_len);
- memcpy(zuc_const, zuc_d, 32);
+ if (key_len == 32)
+ memcpy(zuc_const, zuc_key256, 16);
+ else
+ memcpy(zuc_const, zuc_key128, 32);
+
se_ctx->zsk_flags = 0;
goto success;
case ROC_SE_AES_CTR_EEA2:
diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h
index 051d496f88..5be832fa75 100644
--- a/drivers/common/cnxk/roc_se.h
+++ b/drivers/common/cnxk/roc_se.h
@@ -259,7 +259,8 @@ struct roc_se_fc_params {
struct roc_se_buf_ptr meta_buf;
struct roc_se_buf_ptr ctx_buf;
uint32_t rsvd2;
- uint16_t rsvd3;
+ uint8_t rsvd3;
+ uint8_t iv_ovr;
uint8_t cipher_iv_len;
uint8_t auth_iv_len;
--
2.31.1
next reply other threads:[~2021-11-03 11:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-03 11:22 Vidya Sagar Velumuri [this message]
2021-11-03 11:22 ` [dpdk-dev] [PATCH v1 2/2] crypto/cnxk: fix: supported iv length for zuc 256 Vidya Sagar Velumuri
2021-11-03 13:18 ` [dpdk-dev] [PATCH v2 1/2] common/cnxk: fix: use appropriate zuc constants Vidya Sagar Velumuri
2021-11-03 13:18 ` [dpdk-dev] [PATCH v2 2/2] crypto/cnxk: fix: supported iv length for zuc 256 Vidya Sagar Velumuri
2021-11-03 19:25 ` [dpdk-dev] [PATCH v2 1/2] common/cnxk: fix: use appropriate zuc constants Akhil Goyal
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