From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0EFA8A034F; Fri, 12 Nov 2021 15:17:28 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3679410E3; Fri, 12 Nov 2021 15:17:27 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 3A9B340692 for ; Fri, 12 Nov 2021 15:17:26 +0100 (CET) X-IronPort-AV: E=McAfee;i="6200,9189,10165"; a="319341788" X-IronPort-AV: E=Sophos;i="5.87,229,1631602800"; d="scan'208";a="319341788" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2021 06:17:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,229,1631602800"; d="scan'208";a="453161824" Received: from silpixa00400072.ir.intel.com (HELO silpixa00400072.ger.corp.intel.com) ([10.237.222.91]) by orsmga006.jf.intel.com with ESMTP; 12 Nov 2021 06:17:22 -0800 From: Vladimir Medvedkin To: dev@dpdk.org Cc: thomas@monjalon.net, david.marchand@redhat.com, konstantin.ananyev@intel.com, lance.richardson@broadcom.com, vladimir.medvedkin@intel.com, Ji@dpdk.org, Kai , Yipeng Wang , Sameh Gobriel , Bruce Richardson Subject: [PATCH v2] hash: fix thash gfni implementation Date: Fri, 12 Nov 2021 14:17:19 +0000 Message-Id: <20211112141719.232932-1-vladimir.medvedkin@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211109172456.147140-1-vladimir.medvedkin@intel.com> References: <20211109172456.147140-1-vladimir.medvedkin@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 1. This patch replaces _mm512_set_epi8 with _mm512_set_epi32 due to the lack of support by some compilers. 2. This patch checks if AVX512F is supported along with GFNI. This is done if the code is built on a platform that supports GFNI, but does not support AVX512. 3. Also this patch fixes compilation problems on 32bit arch due to lack of support for _mm_extract_epi64() by implementing XOR folding with _mm_extract_epi32() on 32-bit arch. Fixes: 4fd8c4cb0de1 ("hash: add new Toeplitz hash implementation") Cc: vladimir.medvedkin@intel.com Signed-off-by: Vladimir Medvedkin Acked-by: Lance Richardson Acked-by: Ji, Kai --- lib/hash/rte_thash_x86_gfni.h | 44 ++++++++++++++++++++--------------- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/lib/hash/rte_thash_x86_gfni.h b/lib/hash/rte_thash_x86_gfni.h index c2889c3734..987dec4988 100644 --- a/lib/hash/rte_thash_x86_gfni.h +++ b/lib/hash/rte_thash_x86_gfni.h @@ -18,7 +18,7 @@ extern "C" { #endif -#ifdef __GFNI__ +#if defined(__GFNI__) && defined(__AVX512F__) #define RTE_THASH_GFNI_DEFINED #define RTE_THASH_FIRST_ITER_MSK 0x0f0f0f0f0f0e0c08 @@ -33,7 +33,6 @@ __rte_thash_xor_reduce(__m512i xor_acc, uint32_t *val_1, uint32_t *val_2) { __m256i tmp_256_1, tmp_256_2; __m128i tmp128_1, tmp128_2; - uint64_t tmp_1, tmp_2; tmp_256_1 = _mm512_castsi512_si256(xor_acc); tmp_256_2 = _mm512_extracti32x8_epi32(xor_acc, 1); @@ -43,12 +42,24 @@ __rte_thash_xor_reduce(__m512i xor_acc, uint32_t *val_1, uint32_t *val_2) tmp128_2 = _mm256_extracti32x4_epi32(tmp_256_1, 1); tmp128_1 = _mm_xor_si128(tmp128_1, tmp128_2); +#ifdef RTE_ARCH_X86_64 + uint64_t tmp_1, tmp_2; tmp_1 = _mm_extract_epi64(tmp128_1, 0); tmp_2 = _mm_extract_epi64(tmp128_1, 1); tmp_1 ^= tmp_2; *val_1 = (uint32_t)tmp_1; *val_2 = (uint32_t)(tmp_1 >> 32); +#else + uint32_t tmp_1, tmp_2; + tmp_1 = _mm_extract_epi32(tmp128_1, 0); + tmp_2 = _mm_extract_epi32(tmp128_1, 1); + tmp_1 ^= _mm_extract_epi32(tmp128_1, 2); + tmp_2 ^= _mm_extract_epi32(tmp128_1, 3); + + *val_1 = tmp_1; + *val_2 = tmp_2; +#endif } __rte_internal @@ -56,23 +67,18 @@ static inline __m512i __rte_thash_gfni(const uint64_t *mtrx, const uint8_t *tuple, const uint8_t *secondary_tuple, int len) { - __m512i permute_idx = _mm512_set_epi8(7, 6, 5, 4, 7, 6, 5, 4, - 6, 5, 4, 3, 6, 5, 4, 3, - 5, 4, 3, 2, 5, 4, 3, 2, - 4, 3, 2, 1, 4, 3, 2, 1, - 3, 2, 1, 0, 3, 2, 1, 0, - 2, 1, 0, -1, 2, 1, 0, -1, - 1, 0, -1, -2, 1, 0, -1, -2, - 0, -1, -2, -3, 0, -1, -2, -3); - - const __m512i rewind_idx = _mm512_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 59, 0, 0, 0, 59, - 0, 0, 59, 58, 0, 0, 59, 58, - 0, 59, 58, 57, 0, 59, 58, 57); + __m512i permute_idx = _mm512_set_epi32(0x7060504, 0x7060504, + 0x6050403, 0x6050403, + 0x5040302, 0x5040302, + 0x4030201, 0x4030201, + 0x3020100, 0x3020100, + 0x20100FF, 0x20100FF, + 0x100FFFE, 0x100FFFE, + 0xFFFEFD, 0xFFFEFD); + const __m512i rewind_idx = _mm512_set_epi32(0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0x3B, 0x3B, + 0x3B3A, 0x3B3A, + 0x3B3A39, 0x3B3A39); const __mmask64 rewind_mask = RTE_THASH_REWIND_MSK; const __m512i shift_8 = _mm512_set1_epi8(8); __m512i xor_acc = _mm512_setzero_si512(); -- 2.25.1