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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT010.mail.protection.outlook.com (10.13.172.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4713.20 via Frontend Transport; Sun, 21 Nov 2021 13:00:01 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 21 Nov 2021 12:59:59 +0000 From: Raja Zidane To: CC: Matan Azrad , Subject: [PATCH] crypto/mlx5: fix max number of QPs capability Date: Sun, 21 Nov 2021 12:59:43 +0000 Message-ID: <20211121125943.25821-1-rzidane@nvidia.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 15ca59d8-3d73-4806-0e84-08d9aceed430 X-MS-TrafficTypeDiagnostic: BY5PR12MB4834: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(2616005)(8936002)(1076003)(8676002)(6286002)(6666004)(82310400003)(7696005)(36756003)(4326008)(55016002)(450100002)(186003)(47076005)(426003)(83380400001)(356005)(2906002)(316002)(26005)(336012)(36860700001)(6916009)(70206006)(86362001)(508600001)(70586007)(54906003)(16526019)(7636003)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Nov 2021 13:00:01.0629 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15ca59d8-3d73-4806-0e84-08d9aceed430 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT010.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4834 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org An indirect mkey is created for each descriptor in a QP, number of descriptors per QP is configured by the user on QP setup callback. In mlx cryptodev autotest, the max number of QPs (provided by the driver) is created, and due to mkey resource limits, QPs creation fail which leads to the test failing. Since there is no capability of max number of descriptors provided to the user, we can't give an exact number of max QPs available. Reduce the max number of QPs to 128, which supports standard descriptors numbers, including the 4K number provided in the test. Fixes: 6152534e211e ("crypto/mlx5: support queue pairs operations") Cc: stable@dpdk.org Signed-off-by: Raja Zidane --- Acked-by: Matan Azrad drivers/crypto/mlx5/mlx5_crypto.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c index 90e0df7fb2..421c23748a 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.c +++ b/drivers/crypto/mlx5/mlx5_crypto.c @@ -20,7 +20,7 @@ #define MLX5_CRYPTO_DRIVER_NAME crypto_mlx5 #define MLX5_CRYPTO_LOG_NAME pmd.crypto.mlx5 -#define MLX5_CRYPTO_MAX_QPS 1024 +#define MLX5_CRYPTO_MAX_QPS 128 #define MLX5_CRYPTO_MAX_SEGS 56 #define MLX5_CRYPTO_FEATURE_FLAGS \ -- 2.17.1