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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT049.mail.protection.outlook.com (10.13.175.50) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4734.22 via Frontend Transport; Thu, 25 Nov 2021 20:21:04 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 25 Nov 2021 20:21:02 +0000 From: Dmitry Kozlyuk To: CC: Thomas Monjalon , Raslan Darawsheh , Viacheslav Ovsiienko , "Matan Azrad" Subject: [PATCH] common/mlx5: fix MR lookup on slow path Date: Thu, 25 Nov 2021 22:20:44 +0200 Message-ID: <20211125202044.3483813-1-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 789d4bd6-1242-4629-985a-08d9b0511b54 X-MS-TrafficTypeDiagnostic: MN2PR12MB3517: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1169; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(70206006)(83380400001)(70586007)(356005)(336012)(36860700001)(6666004)(26005)(8676002)(16526019)(186003)(426003)(1076003)(4326008)(36756003)(86362001)(6286002)(2616005)(8936002)(7696005)(107886003)(316002)(2906002)(6916009)(82310400004)(55016003)(7636003)(54906003)(5660300002)(508600001)(47076005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Nov 2021 20:21:04.6034 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 789d4bd6-1242-4629-985a-08d9b0511b54 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3517 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Memory region (MR) was being looked up incorrectly for the data address of an externally-attached mbuf. A search was attempted for the mempool of the mbuf, while mbuf data address does not belong to this mempool in case of externally-attached mbuf. Only attempt the search: 1) for not externally-attached mbufs; 2) for mbufs coming from MPRQ mempool; 3) for externally-attached mbufs from mempools with pinned external buffers. Fixes: 08ac03580ef2 ("common/mlx5: fix mempool registration") Signed-off-by: Dmitry Kozlyuk Reviewed-by: Matan Azrad --- drivers/common/mlx5/mlx5_common_mr.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c index 01f35ebcdf..c694aaf28c 100644 --- a/drivers/common/mlx5/mlx5_common_mr.c +++ b/drivers/common/mlx5/mlx5_common_mr.c @@ -2002,21 +2002,29 @@ mlx5_mr_mb2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mb) dev_gen); struct mlx5_common_device *cdev = container_of(share_cache, struct mlx5_common_device, mr_scache); + bool external, mprq, pinned = false; /* Recover MPRQ mempool. */ - if (RTE_MBUF_HAS_EXTBUF(mb) && - mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) { + external = RTE_MBUF_HAS_EXTBUF(mb); + if (external && mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) { + mprq = true; buf = mb->shinfo->fcb_opaque; mp = buf->mp; } else { + mprq = false; mp = mlx5_mb2mp(mb); + pinned = rte_pktmbuf_priv_flags(mp) & + RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF; + } + if (!external || mprq || pinned) { + lkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr); + if (lkey != UINT32_MAX) + return lkey; + /* MPRQ is always registered. */ + MLX5_ASSERT(!mprq); } - lkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr); - if (lkey != UINT32_MAX) - return lkey; /* Register pinned external memory if the mempool is not used for Rx. */ - if (cdev->config.mr_mempool_reg_en && - (rte_pktmbuf_priv_flags(mp) & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)) { + if (cdev->config.mr_mempool_reg_en && pinned) { if (mlx5_mr_mempool_register(cdev, mp, true) < 0) return UINT32_MAX; lkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr); -- 2.25.1