From: Ashwin Sekhar T K <asekhar@marvell.com>
To: <dev@dpdk.org>
Cc: <ndabilpuram@marvell.com>, <jerinj@marvell.com>,
<skori@marvell.com>, <skoteshwar@marvell.com>,
<pbhagavatula@marvell.com>, <kirankumark@marvell.com>,
<psatheesh@marvell.com>, <asekhar@marvell.com>,
<anoobj@marvell.com>, <gakhil@marvell.com>
Subject: [PATCH] common/cnxk: update cpu directive in NPA assembly code
Date: Tue, 30 Nov 2021 11:18:09 +0530 [thread overview]
Message-ID: <20211130054809.2697001-1-asekhar@marvell.com> (raw)
Update the CPU directive in ROC NPA assembly code snippets.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
---
drivers/common/cnxk/roc_npa.h | 30 +++++++++++++-----------------
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h
index 46350fdb48..aeadc3d5e2 100644
--- a/drivers/common/cnxk/roc_npa.h
+++ b/drivers/common/cnxk/roc_npa.h
@@ -433,7 +433,7 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,
switch (num) {
case 30:
asm volatile(
- ".cpu generic+lse\n"
+ ".arch_extension lse\n"
"mov v18.d[0], %[dst]\n"
"mov v18.d[1], %[loc]\n"
"mov v19.d[0], %[wdata]\n"
@@ -497,7 +497,7 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,
break;
case 16:
asm volatile(
- ".cpu generic+lse\n"
+ ".arch_extension lse\n"
"mov x16, %[wdata]\n"
"mov x17, %[wdata]\n"
"casp x0, x1, x16, x17, [%[loc]]\n"
@@ -517,15 +517,14 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,
"stp x12, x13, [%[dst], #96]\n"
"stp x14, x15, [%[dst], #112]\n"
:
- : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr)
+ : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
: "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6",
"x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14",
- "x15", "x16", "x17"
- );
+ "x15", "x16", "x17");
break;
case 8:
asm volatile(
- ".cpu generic+lse\n"
+ ".arch_extension lse\n"
"mov x16, %[wdata]\n"
"mov x17, %[wdata]\n"
"casp x0, x1, x16, x17, [%[loc]]\n"
@@ -537,14 +536,13 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,
"stp x4, x5, [%[dst], #32]\n"
"stp x6, x7, [%[dst], #48]\n"
:
- : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr)
+ : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
: "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6",
- "x7", "x16", "x17"
- );
+ "x7", "x16", "x17");
break;
case 4:
asm volatile(
- ".cpu generic+lse\n"
+ ".arch_extension lse\n"
"mov x16, %[wdata]\n"
"mov x17, %[wdata]\n"
"casp x0, x1, x16, x17, [%[loc]]\n"
@@ -552,21 +550,19 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,
"stp x0, x1, [%[dst]]\n"
"stp x2, x3, [%[dst], #16]\n"
:
- : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr)
- : "memory", "x0", "x1", "x2", "x3", "x16", "x17"
- );
+ : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
+ : "memory", "x0", "x1", "x2", "x3", "x16", "x17");
break;
case 2:
asm volatile(
- ".cpu generic+lse\n"
+ ".arch_extension lse\n"
"mov x16, %[wdata]\n"
"mov x17, %[wdata]\n"
"casp x0, x1, x16, x17, [%[loc]]\n"
"stp x0, x1, [%[dst]]\n"
:
- : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr)
- : "memory", "x0", "x1", "x16", "x17"
- );
+ : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr)
+ : "memory", "x0", "x1", "x16", "x17");
break;
case 1:
buf[0] = roc_npa_aura_op_alloc(aura_handle, drop);
--
2.32.0
next reply other threads:[~2021-11-30 5:50 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 5:48 Ashwin Sekhar T K [this message]
2022-01-06 14:03 ` Jerin Jacob
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