[PATCH 1/2] common/cnxk: get head-tail of Rx and Tx queues

[PATCH 1/2] common/cnxk: get head-tail of Rx and Tx queues

[Rahul Bhansali]

Adds roc APIs roc_nix_cq_head_tail_get, roc_nix_sq_head_tail_get
to get head-tail of receive and transmit queue respectively.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
 drivers/common/cnxk/roc_nix.h       |  4 +++
 drivers/common/cnxk/roc_nix_queue.c | 53 +++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map     |  2 ++
 3 files changed, 59 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 69a5e8e7b4..d79abfef9f 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -795,8 +795,12 @@ int __roc_api roc_nix_rq_ena_dis(struct roc_nix_rq *rq, bool enable);
 int __roc_api roc_nix_rq_fini(struct roc_nix_rq *rq);
 int __roc_api roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq);
 int __roc_api roc_nix_cq_fini(struct roc_nix_cq *cq);
+void __roc_api roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid,
+					uint32_t *head, uint32_t *tail);
 int __roc_api roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq);
 int __roc_api roc_nix_sq_fini(struct roc_nix_sq *sq);
+void __roc_api roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid,
+					uint32_t *head, uint32_t *tail);
 
 /* PTP */
 int __roc_api roc_nix_ptp_rx_ena_dis(struct roc_nix *roc_nix, int enable);
diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index c8c8401d81..9fc26da5c6 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -959,3 +959,56 @@ roc_nix_sq_fini(struct roc_nix_sq *sq)
 
 	return rc;
 }
+
+void
+roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head,
+			 uint32_t *tail)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	uint64_t reg, val;
+	int64_t *addr;
+
+	if (head == NULL || tail == NULL)
+		return;
+
+	reg = (((uint64_t)qid) << 32);
+	addr = (int64_t *)(nix->base + NIX_LF_CQ_OP_STATUS);
+	val = roc_atomic64_add_nosync(reg, addr);
+	if (val &
+	    (BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) | BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR)))
+		val = 0;
+
+	*tail = (uint32_t)(val & 0xFFFFF);
+	*head = (uint32_t)((val >> 20) & 0xFFFFF);
+}
+
+void
+roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head,
+			 uint32_t *tail)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct roc_nix_sq *sq = nix->sqs[qid];
+	uint16_t sqes_per_sqb, sqb_cnt;
+	uint64_t reg, val;
+	int64_t *addr;
+
+	if (head == NULL || tail == NULL)
+		return;
+
+	reg = (((uint64_t)qid) << 32);
+	addr = (int64_t *)(nix->base + NIX_LF_SQ_OP_STATUS);
+	val = roc_atomic64_add_nosync(reg, addr);
+	if (val & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR)) {
+		val = 0;
+		return;
+	}
+
+	*tail = (uint32_t)((val >> 28) & 0x3F);
+	*head = (uint32_t)((val >> 20) & 0x3F);
+	sqb_cnt = (uint16_t)(val & 0xFFFF);
+
+	sqes_per_sqb = 1 << sq->sqes_per_sqb_log2;
+
+	/* Update tail index as per used sqb count */
+	*tail += (sqes_per_sqb * (sqb_cnt - 1));
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 07c6720f0c..a9dba47e0e 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -107,6 +107,7 @@ INTERNAL {
 	roc_nix_bpf_timeunit_get;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
+	roc_nix_cq_head_tail_get;
 	roc_nix_cq_init;
 	roc_nix_cqe_dump;
 	roc_nix_dev_fini;
@@ -222,6 +223,7 @@ INTERNAL {
 	roc_nix_rx_queue_intr_enable;
 	roc_nix_sq_dump;
 	roc_nix_sq_fini;
+	roc_nix_sq_head_tail_get;
 	roc_nix_sq_init;
 	roc_nix_stats_get;
 	roc_nix_stats_queue_get;
-- 
2.25.1

[PATCH 2/2] net/cnxk: ethdev Rx/Tx queue status callbacks

[Rahul Bhansali]

Provides ethdev callback support of rx_queue_count,
rx_descriptor_status and tx_descriptor_status.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
 drivers/net/cnxk/cnxk_ethdev.c     |  3 ++
 drivers/net/cnxk/cnxk_ethdev.h     |  5 +++
 drivers/net/cnxk/cnxk_ethdev_ops.c | 60 ++++++++++++++++++++++++++++++
 3 files changed, 68 insertions(+)

diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 74f625553d..183fd241d8 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1595,6 +1595,9 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
 	int rc, max_entries;
 
 	eth_dev->dev_ops = &cnxk_eth_dev_ops;
+	eth_dev->rx_queue_count = cnxk_nix_rx_queue_count;
+	eth_dev->rx_descriptor_status = cnxk_nix_rx_descriptor_status;
+	eth_dev->tx_descriptor_status = cnxk_nix_tx_descriptor_status;
 
 	/* Alloc security context */
 	sec_ctx = plt_zmalloc(sizeof(struct rte_security_ctx), 0);
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 5bfda3d815..43814a81fc 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -559,6 +559,11 @@ void cnxk_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
 void cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
 			   struct rte_eth_txq_info *qinfo);
 
+/* Queue status */
+int cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset);
+int cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset);
+uint32_t cnxk_nix_rx_queue_count(void *rxq);
+
 /* Lookup configuration */
 const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev);
 void *cnxk_nix_fastpath_lookup_mem_get(void);
diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c
index ce5f1f7240..1255d6b40f 100644
--- a/drivers/net/cnxk/cnxk_ethdev_ops.c
+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c
@@ -694,6 +694,66 @@ cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
 	memcpy(&qinfo->conf, &txq_sp->qconf.conf.tx, sizeof(qinfo->conf));
 }
 
+uint32_t
+cnxk_nix_rx_queue_count(void *rxq)
+{
+	struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);
+	struct roc_nix *nix = &rxq_sp->dev->nix;
+	uint32_t head, tail;
+
+	roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);
+	return (tail - head) % (rxq_sp->qconf.nb_desc);
+}
+
+static inline int
+nix_offset_has_packet(uint32_t head, uint32_t tail, uint16_t offset, bool is_rx)
+{
+	/* Check given offset(queue index) has packet filled/xmit by HW
+	 * in case of Rx or Tx.
+	 * Also, checks for wrap around case.
+	 */
+	return ((tail > head && offset <= tail && offset >= head) ||
+		(head > tail && (offset >= head || offset <= tail))) ?
+		       is_rx :
+		       !is_rx;
+}
+
+int
+cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset)
+{
+	struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);
+	struct roc_nix *nix = &rxq_sp->dev->nix;
+	uint32_t head, tail;
+
+	if (rxq_sp->qconf.nb_desc <= offset)
+		return -EINVAL;
+
+	roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);
+
+	if (nix_offset_has_packet(head, tail, offset, 1))
+		return RTE_ETH_RX_DESC_DONE;
+	else
+		return RTE_ETH_RX_DESC_AVAIL;
+}
+
+int
+cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset)
+{
+	struct cnxk_eth_txq_sp *txq_sp = cnxk_eth_txq_to_sp(txq);
+	struct roc_nix *nix = &txq_sp->dev->nix;
+	uint32_t head = 0, tail = 0;
+
+	if (txq_sp->qconf.nb_desc <= offset)
+		return -EINVAL;
+
+	roc_nix_sq_head_tail_get(nix, txq_sp->qid, &head, &tail);
+
+	if (nix_offset_has_packet(head, tail, offset, 0))
+		return RTE_ETH_TX_DESC_DONE;
+	else
+		return RTE_ETH_TX_DESC_FULL;
+}
+
 /* It is a NOP for cnxk as HW frees the buffer on xmit */
 int
 cnxk_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
-- 
2.25.1

Re: [PATCH 2/2] net/cnxk: ethdev Rx/Tx queue status callbacks

[Jerin Jacob]

On Fri, Dec 3, 2021 at 10:06 PM Rahul Bhansali <rbhansali@marvell.com> wrote:
>
> Provides ethdev callback support of rx_queue_count,
> rx_descriptor_status and tx_descriptor_status.
>
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>

Missed to update doc/guides/nics/features/cnxk* for "Rx descriptor
status" and "Tx descriptor status".
Rest looks good to me. Please send the next version.


> ---
>  drivers/net/cnxk/cnxk_ethdev.c     |  3 ++
>  drivers/net/cnxk/cnxk_ethdev.h     |  5 +++
>  drivers/net/cnxk/cnxk_ethdev_ops.c | 60 ++++++++++++++++++++++++++++++
>  3 files changed, 68 insertions(+)
>
> diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
> index 74f625553d..183fd241d8 100644
> --- a/drivers/net/cnxk/cnxk_ethdev.c
> +++ b/drivers/net/cnxk/cnxk_ethdev.c
> @@ -1595,6 +1595,9 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
>         int rc, max_entries;
>
>         eth_dev->dev_ops = &cnxk_eth_dev_ops;
> +       eth_dev->rx_queue_count = cnxk_nix_rx_queue_count;
> +       eth_dev->rx_descriptor_status = cnxk_nix_rx_descriptor_status;
> +       eth_dev->tx_descriptor_status = cnxk_nix_tx_descriptor_status;
>
>         /* Alloc security context */
>         sec_ctx = plt_zmalloc(sizeof(struct rte_security_ctx), 0);
> diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
> index 5bfda3d815..43814a81fc 100644
> --- a/drivers/net/cnxk/cnxk_ethdev.h
> +++ b/drivers/net/cnxk/cnxk_ethdev.h
> @@ -559,6 +559,11 @@ void cnxk_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
>  void cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
>                            struct rte_eth_txq_info *qinfo);
>
> +/* Queue status */
> +int cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset);
> +int cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset);
> +uint32_t cnxk_nix_rx_queue_count(void *rxq);
> +
>  /* Lookup configuration */
>  const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev);
>  void *cnxk_nix_fastpath_lookup_mem_get(void);
> diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c
> index ce5f1f7240..1255d6b40f 100644
> --- a/drivers/net/cnxk/cnxk_ethdev_ops.c
> +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c
> @@ -694,6 +694,66 @@ cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
>         memcpy(&qinfo->conf, &txq_sp->qconf.conf.tx, sizeof(qinfo->conf));
>  }
>
> +uint32_t
> +cnxk_nix_rx_queue_count(void *rxq)
> +{
> +       struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);
> +       struct roc_nix *nix = &rxq_sp->dev->nix;
> +       uint32_t head, tail;
> +
> +       roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);
> +       return (tail - head) % (rxq_sp->qconf.nb_desc);
> +}
> +
> +static inline int
> +nix_offset_has_packet(uint32_t head, uint32_t tail, uint16_t offset, bool is_rx)
> +{
> +       /* Check given offset(queue index) has packet filled/xmit by HW
> +        * in case of Rx or Tx.
> +        * Also, checks for wrap around case.
> +        */
> +       return ((tail > head && offset <= tail && offset >= head) ||
> +               (head > tail && (offset >= head || offset <= tail))) ?
> +                      is_rx :
> +                      !is_rx;
> +}
> +
> +int
> +cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset)
> +{
> +       struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);
> +       struct roc_nix *nix = &rxq_sp->dev->nix;
> +       uint32_t head, tail;
> +
> +       if (rxq_sp->qconf.nb_desc <= offset)
> +               return -EINVAL;
> +
> +       roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);
> +
> +       if (nix_offset_has_packet(head, tail, offset, 1))
> +               return RTE_ETH_RX_DESC_DONE;
> +       else
> +               return RTE_ETH_RX_DESC_AVAIL;
> +}
> +
> +int
> +cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset)
> +{
> +       struct cnxk_eth_txq_sp *txq_sp = cnxk_eth_txq_to_sp(txq);
> +       struct roc_nix *nix = &txq_sp->dev->nix;
> +       uint32_t head = 0, tail = 0;
> +
> +       if (txq_sp->qconf.nb_desc <= offset)
> +               return -EINVAL;
> +
> +       roc_nix_sq_head_tail_get(nix, txq_sp->qid, &head, &tail);
> +
> +       if (nix_offset_has_packet(head, tail, offset, 0))
> +               return RTE_ETH_TX_DESC_DONE;
> +       else
> +               return RTE_ETH_TX_DESC_FULL;
> +}
> +
>  /* It is a NOP for cnxk as HW frees the buffer on xmit */
>  int
>  cnxk_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
> --
> 2.25.1
>