From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3661A034F; Mon, 6 Dec 2021 13:20:00 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2BEC74276F; Mon, 6 Dec 2021 13:18:46 +0100 (CET) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by mails.dpdk.org (Postfix) with ESMTP id E950C411B6 for ; Mon, 6 Dec 2021 13:18:32 +0100 (CET) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CC3E11A1333; Mon, 6 Dec 2021 13:18:32 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 958F31A19B6; Mon, 6 Dec 2021 13:18:32 +0100 (CET) Received: from lsv03274.swis.in-blr01.nxp.com (lsv03274.swis.in-blr01.nxp.com [92.120.147.114]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 0818A183AD05; Mon, 6 Dec 2021 20:18:31 +0800 (+08) From: nipun.gupta@nxp.com To: dev@dpdk.org Cc: thomas@monjalon.net, ferruh.yigit@intel.com, hemant.agrawal@nxp.com, Gagandeep Singh Subject: [PATCH 14/17] net/pfe: disable HW CRC stripping Date: Mon, 6 Dec 2021 17:48:21 +0530 Message-Id: <20211206121824.3493-15-nipun.gupta@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211206121824.3493-1-nipun.gupta@nxp.com> References: <20211206121824.3493-1-nipun.gupta@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Gagandeep Singh LS1012A MAC PCS block has an erratum that is seen with specific PHY AR803x. The issue is triggered by the (spec-compliant) operation of the AR803x PHY on the LS1012A-FRWY board. Due to this, good FCS packet is reported as error packet by MAC, so for these error packets FCS should be validated and discard only real error packets in PFE engine Rx packet path. Now onwards CRC validation will be handled in pfe.ko and DPDK driver can not use CRC Forwarding option. Signed-off-by: Gagandeep Singh --- drivers/net/pfe/pfe_ethdev.c | 7 +++++-- drivers/net/pfe/pfe_hal.c | 4 ++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/net/pfe/pfe_ethdev.c b/drivers/net/pfe/pfe_ethdev.c index 047010e15e..bfcaf51dd9 100644 --- a/drivers/net/pfe/pfe_ethdev.c +++ b/drivers/net/pfe/pfe_ethdev.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include @@ -422,8 +422,11 @@ pfe_eth_close(struct rte_eth_dev *dev) } static int -pfe_eth_configure(struct rte_eth_dev *dev __rte_unused) +pfe_eth_configure(struct rte_eth_dev *dev) { + if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) + PFE_PMD_ERR("PMD does not support KEEP_CRC offload"); + return 0; } diff --git a/drivers/net/pfe/pfe_hal.c b/drivers/net/pfe/pfe_hal.c index 41d783dbff..f49d1728b2 100644 --- a/drivers/net/pfe/pfe_hal.c +++ b/drivers/net/pfe/pfe_hal.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include @@ -191,7 +191,7 @@ gemac_set_mode(void *base, __rte_unused int mode) val &= ~EMAC_RCNTRL_LOOP; /*Enable flow control and MII mode*/ - val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE | EMAC_RCNTRL_CRC_FWD); + val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE); writel(val, base + EMAC_RCNTRL_REG); } -- 2.17.1