From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 23A66A00C2; Thu, 9 Dec 2021 10:14:33 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 23863426DD; Thu, 9 Dec 2021 10:14:11 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 1B91E42707 for ; Thu, 9 Dec 2021 10:14:09 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1B97bEvn009585 for ; Thu, 9 Dec 2021 01:14:08 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=lCHGoeacr4/DihoB20gvprz62Bj47ofupmSvtvFcFUQ=; b=C4IICYtdUSRW6sq7TD1ZSvmhIE+hXziQ9sZrQolXRslmUfrmH73Ov8hvQvlSLDmiVHfB lXJr/DKPcSQGdDfVjEYf5GVUYkRMAb42fEBW6kJBJWYi/tQQ2/gQkkOhMnaKAEgsuwzv hykl2KVn5DsuWC4ldqsRUqcDeasNhn/VwZge0TqXdAA6lDF3+jc6dRXJNQu+giAqzonN OXFyV/RSSs0QC5tRdD4oM7JvqXg9dHtItYhlMdbvY2Ym/NWkfmzDNdRLeafJaaNk+619 hTPYRhcybN9WGg96jX+j3U1wNTh5FzXiVW9RM+VLI7Kw3LFk/Ctb7c4haBVloXHcAqE8 eA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3cudjt0aq7-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 09 Dec 2021 01:14:08 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 9 Dec 2021 01:14:06 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 9 Dec 2021 01:14:06 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 4DB873F7054; Thu, 9 Dec 2021 01:14:05 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k Date: Thu, 9 Dec 2021 14:43:41 +0530 Message-ID: <20211209091342.27017-7-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20211209091342.27017-1-ndabilpuram@marvell.com> References: <20211209091342.27017-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: F8C90PqQX89b-vltpNg9grZfgn_l08lV X-Proofpoint-GUID: F8C90PqQX89b-vltpNg9grZfgn_l08lV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Improve inbound inline error handling for CN9K in terms of packet delivered to application for different kinds of errors. Also update udp ports to be used for UDP encapsulation support. Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/cnxk_security.c | 6 +++++ drivers/common/cnxk/roc_ie_on.h | 16 +++++++++++- drivers/net/cnxk/cn9k_rx.h | 50 +++++++++++++++++++++++++++++++++++-- 3 files changed, 69 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c index 30562b4..8b4dd1c 100644 --- a/drivers/common/cnxk/cnxk_security.c +++ b/drivers/common/cnxk/cnxk_security.c @@ -710,6 +710,12 @@ cnxk_onf_ipsec_outb_sa_fill(struct roc_onf_ipsec_outb_sa *sa, return -EINVAL; } + /* Update udp encap ports */ + if (ipsec_xfrm->options.udp_encap == 1) { + sa->udp_src = 4500; + sa->udp_dst = 4500; + } + skip_tunnel_info: rte_wmb(); diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h index 53591c6..376e698 100644 --- a/drivers/common/cnxk/roc_ie_on.h +++ b/drivers/common/cnxk/roc_ie_on.h @@ -188,7 +188,21 @@ struct roc_ie_on_inb_sa { #define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL /* Ucode completion codes */ -#define ROC_IE_ONF_UCC_SUCCESS 0 +#define ROC_IE_ON_UCC_SUCCESS 0 +#define ROC_IE_ON_UCC_ENC_TYPE_ERR 0xB1 +#define ROC_IE_ON_UCC_IP_VER_ERR 0xB2 +#define ROC_IE_ON_UCC_PROTO_ERR 0xB3 +#define ROC_IE_ON_UCC_CTX_INVALID 0xB4 +#define ROC_IE_ON_UCC_CTX_DIR_MISMATCH 0xB5 +#define ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR 0xB6 +#define ROC_IE_ON_UCC_CTX_FLAG_MISMATCH 0xB7 +#define ROC_IE_ON_UCC_SPI_MISMATCH 0xBE +#define ROC_IE_ON_UCC_IP_CHKSUM_ERR 0xBF +#define ROC_IE_ON_UCC_AUTH_ERR 0xC3 +#define ROC_IE_ON_UCC_PADDING_INVALID 0xC4 +#define ROC_IE_ON_UCC_SA_MISMATCH 0xCC +#define ROC_IE_ON_UCC_L2_HDR_INFO_ERR 0xCF +#define ROC_IE_ON_UCC_L2_HDR_LEN_ERR 0xE0 struct roc_ie_onf_sa_ctl { uint32_t spi; diff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h index 225bb41..cbb6299 100644 --- a/drivers/net/cnxk/cn9k_rx.h +++ b/drivers/net/cnxk/cn9k_rx.h @@ -211,6 +211,52 @@ ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa, return rc; } +static inline uint64_t +nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res, + uint64_t *rearm_val, uint16_t *len) +{ + uint8_t uc_cc = res >> 8; + uint8_t cc = res & 0xFF; + uint64_t data_off; + uint64_t ol_flags; + uint16_t m_len; + + if (unlikely(cc != CPT_COMP_GOOD)) + return RTE_MBUF_F_RX_SEC_OFFLOAD | + RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED; + + data_off = *rearm_val & (BIT_ULL(16) - 1); + m_len = rx->cn9k.pkt_lenm1 + 1; + + switch (uc_cc) { + case ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR: + case ROC_IE_ON_UCC_AUTH_ERR: + case ROC_IE_ON_UCC_PADDING_INVALID: + /* Adjust data offset to start at copied L2 */ + data_off += ROC_ONF_IPSEC_INB_SPI_SEQ_SZ + + ROC_ONF_IPSEC_INB_MAX_L2_SZ; + ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD | + RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED; + break; + case ROC_IE_ON_UCC_CTX_INVALID: + case ROC_IE_ON_UCC_SPI_MISMATCH: + case ROC_IE_ON_UCC_SA_MISMATCH: + /* Return as normal packet */ + ol_flags = 0; + break; + default: + /* Return as error packet after updating packet lengths */ + ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD | + RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED; + break; + } + + *len = m_len; + *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1); + *rearm_val |= data_off; + return ol_flags; +} + static __rte_always_inline uint64_t nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m, uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len) @@ -236,8 +282,8 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m, rte_prefetch0((void *)data); - if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ONF_UCC_SUCCESS << 8))) - return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED; + if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ON_UCC_SUCCESS << 8))) + return nix_rx_sec_mbuf_err_update(rx, res, rearm_val, len); data += lcptr; /* 20 bits of tag would have the SPI */ -- 2.8.4