From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 34DC0A034F; Tue, 11 Jan 2022 14:41:41 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2343B42708; Tue, 11 Jan 2022 14:41:41 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 0111441143; Tue, 11 Jan 2022 14:41:38 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1641908499; x=1673444499; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z0N9Bxnw3A4KEGlkTED7T3U6YuuleNducmrX5TimkxI=; b=YCtpYMNfs9B4E84hAA4Cj88IlnDup1706fefhSuLLnZ1bW903U6OExAo X/qfH9CUQsqAfDiZLjVrBDTs0P369nxb+DOCBYJP2tPuxRrxU3wl/e9oY /4ABXyKtFZiM0bW4FSHgs7p6T3nmSEQC0c1xKQrBcG11yr3bqZNLyPZ/C wlUaKpiQTZqSd8GvpxCYa5UC8ji8T3pDV442dfCFg9+wABHjaGazK5PkR OnHFYjl1fq46TiGcsU1xwecWEYWGGwLalDBnowwLN4djiVE6Q8Df9sEHh l8wJAo3qLzSz5XzxrzvcM3KfgpDb5vlgnT1VOSJN6rdaRfgrQ2fmFLjDC Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10223"; a="306836000" X-IronPort-AV: E=Sophos;i="5.88,279,1635231600"; d="scan'208";a="306836000" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2022 05:41:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,279,1635231600"; d="scan'208";a="690997103" Received: from silpixa00399126.ir.intel.com ([10.237.223.86]) by orsmga005.jf.intel.com with ESMTP; 11 Jan 2022 05:41:36 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , kevin.laatz@intel.com, stable@dpdk.org, Jiayu Hu , Conor Walsh , Chengwen Feng Subject: [PATCH v2 1/4] dma/idxd: fix burst capacity calculation Date: Tue, 11 Jan 2022 13:41:02 +0000 Message-Id: <20220111134105.1007191-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220111134105.1007191-1-bruce.richardson@intel.com> References: <20211220170514.736732-1-bruce.richardson@intel.com> <20220111134105.1007191-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When the maximum burst size supported by HW is less than the available ring space, incorrect capacity was returned when there was already some jobs queued up for submission. This was because the capacity calculation failed to subtract the number of already-enqueued jobs from the max burst size. After subtraction is done, ensure that any negative values (which should never occur if the user respects the reported limits), are clamped to zero. Fixes: 9459de4edc99 ("dma/idxd: add burst capacity") Cc: kevin.laatz@intel.com Cc: stable@dpdk.org Signed-off-by: Bruce Richardson Acked-by: Kevin Laatz Tested-by: Jiayu Hu --- drivers/dma/idxd/idxd_common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/dma/idxd/idxd_common.c b/drivers/dma/idxd/idxd_common.c index fc11b11337..4442d1cbbd 100644 --- a/drivers/dma/idxd/idxd_common.c +++ b/drivers/dma/idxd/idxd_common.c @@ -485,7 +485,9 @@ idxd_burst_capacity(const void *dev_private, uint16_t vchan __rte_unused) write_idx += idxd->desc_ring_mask + 1; used_space = write_idx - idxd->ids_returned; - return RTE_MIN((idxd->desc_ring_mask - used_space), idxd->max_batch_size); + const int ret = RTE_MIN((idxd->desc_ring_mask - used_space), + (idxd->max_batch_size - idxd->batch_size)); + return ret < 0 ? 0 : (uint16_t)ret; } int -- 2.32.0