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Date: Fri, 21 Jan 2022 08:19:56 -0800
From: Stephen Hemminger <stephen@networkplumber.org>
To: Wei Huang <wei.huang@intel.com>
Cc: dev@dpdk.org, rosen.xu@intel.com, qi.z.zhang@intel.com, stable@dpdk.org,
tianfei.zhang@intel.com, ferruh.yigit@intel.com, david.marchand@redhat.com
Subject: Re: [PATCH v5] raw/ifpga: fix pthread cannot join
Message-ID: <20220121081956.4837e66a@hermes.local>
In-Reply-To: <20220121033246.10339-1-wei.huang@intel.com>
References: <20220121012932.9827-1-wei.huang>
<20220121033246.10339-1-wei.huang@intel.com>
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On Thu, 20 Jan 2022 22:32:46 -0500
Wei Huang <wei.huang@intel.com> wrote:
> @@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
> int gsd_enable, ret;
> #define MS 1000
>
> - while (1) {
> + while (rte_atomic32_read(&ifpga_monitor_start)) {
Better, but rte_atomic is deprecated in favor of using __atomic builtin
instead. This is because there are more options possible with
__atomic_load_n than rte_atomic32_read. rte_atomic32_read has to assume
worst case memory ordering, and your example relaxed memory ordering is
what you need.