From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D410EA04A3; Mon, 24 Jan 2022 23:32:53 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6A12941147; Mon, 24 Jan 2022 23:32:53 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 445E140040 for ; Mon, 24 Jan 2022 23:32:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643063572; x=1674599572; h=from:to:cc:subject:date:message-id; bh=mLGPk8ESXrvWa5CQ610yaSVLvoFypMYjCctZC5Dkow0=; b=klgxg0r11KQqssPdWeqgzRnJ5UeaX5pCVKLtX0YlQLO6COx1NRc4Kjp7 CSIN6rm5RyTMtp6yIOqvzB5p8p5SB19DTCvCUM3v+gVmxPjodC+XX8V6s POtr4gNneElwJeXIPrmc/dG4S8ZQ3CZFN6Mu5HUBcsr/m4ktN6mXfLtbp RfkkCjd0mRDQLGjwMkmREA9YChTVwvY3RhO87Db41OVMgvSJYX0A5B1/x H8s9lu+7yzgsg1Ak+3FYRI7wN/dRPOTgGmylc/1LinFfoa6FWCz6/S65i iVFJWD9Cg6+rl+0Zvx7f5T889wr3yufKO/NJNlxbK7wZNFpnCAnBelx/A Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10237"; a="309482655" X-IronPort-AV: E=Sophos;i="5.88,313,1635231600"; d="scan'208";a="309482655" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2022 14:32:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,313,1635231600"; d="scan'208";a="627674072" Received: from silpixa00400573.ir.intel.com (HELO silpixa00400573.ger.corp.intel.com) ([10.237.223.107]) by orsmga004.jf.intel.com with ESMTP; 24 Jan 2022 14:32:49 -0800 From: Cristian Dumitrescu To: dev@dpdk.org Cc: Yogesh Jangra Subject: [PATCH] pipeline: support checksum for variable size headers Date: Mon, 24 Jan 2022 22:32:49 +0000 Message-Id: <20220124223249.67660-1-cristian.dumitrescu@intel.com> X-Mailer: git-send-email 2.17.1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added checksum support for variable size headers such as IPv4 headers with options. Signed-off-by: Cristian Dumitrescu Signed-off-by: Yogesh Jangra --- lib/pipeline/rte_swx_pipeline.c | 3 +-- lib/pipeline/rte_swx_pipeline_internal.h | 21 +++++++++++---------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c index 1a50c4bb72..1e18906274 100644 --- a/lib/pipeline/rte_swx_pipeline.c +++ b/lib/pipeline/rte_swx_pipeline.c @@ -2908,7 +2908,6 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p, /* CKADD_STRUCT, CKADD_STRUCT20. */ hsrc = header_parse(p, src); CHECK(hsrc, EINVAL); - CHECK(!hsrc->st->var_size, EINVAL); instr->type = INSTR_ALU_CKADD_STRUCT; if ((hsrc->st->n_bits / 8) == 20) @@ -2918,7 +2917,7 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p, instr->alu.dst.n_bits = fdst->n_bits; instr->alu.dst.offset = fdst->offset / 8; instr->alu.src.struct_id = (uint8_t)hsrc->struct_id; - instr->alu.src.n_bits = hsrc->st->n_bits; + instr->alu.src.n_bits = (uint8_t)hsrc->id; /* The src header ID is stored here. */ instr->alu.src.offset = 0; /* Unused. */ return 0; } diff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h index 2e86383e45..8f057deef9 100644 --- a/lib/pipeline/rte_swx_pipeline_internal.h +++ b/lib/pipeline/rte_swx_pipeline_internal.h @@ -309,8 +309,8 @@ enum instruction_type { * dst = H, src = {H, h.header} */ INSTR_ALU_CKADD_FIELD, /* src = H */ - INSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 */ - INSTR_ALU_CKADD_STRUCT, /* src = h.hdeader, with any sizeof(header) */ + INSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 bytes. */ + INSTR_ALU_CKADD_STRUCT, /* src = h.header, with sizeof(header) any 4-byte multiple. */ /* cksub dst src * dst = dst '- src @@ -2854,6 +2854,7 @@ __instr_alu_ckadd_struct_exec(struct rte_swx_pipeline *p __rte_unused, struct thread *t, const struct instruction *ip) { + uint32_t src_header_id = ip->alu.src.n_bits; /* The src header ID is stored here. */ uint8_t *dst_struct, *src_struct; uint16_t *dst16_ptr; uint32_t *src32_ptr; @@ -2869,26 +2870,26 @@ __instr_alu_ckadd_struct_exec(struct rte_swx_pipeline *p __rte_unused, src_struct = t->structs[ip->alu.src.struct_id]; src32_ptr = (uint32_t *)&src_struct[0]; - /* The max number of 32-bit words in a 256-byte header is 8 = 2^3. - * Therefore, in the worst case scenario, a 35-bit number is added to a - * 16-bit number (the input r), so the output r is 36-bit number. + /* The max number of 32-bit words in a 32K-byte header is 2^13. + * Therefore, in the worst case scenario, a 45-bit number is added to a + * 16-bit number (the input r), so the output r is 46-bit number. */ - for (i = 0; i < ip->alu.src.n_bits / 32; i++, src32_ptr++) + for (i = 0; i < t->headers[src_header_id].n_bytes / 4; i++, src32_ptr++) r += *src32_ptr; - /* The first input is a 16-bit number. The second input is a 20-bit - * number. Their sum is a 21-bit number. + /* The first input is a 16-bit number. The second input is a 30-bit + * number. Their sum is a 31-bit number. */ r = (r & 0xFFFF) + (r >> 16); /* The first input is a 16-bit number (0 .. 0xFFFF). The second input is - * a 5-bit number (0 .. 31). The sum is a 17-bit number (0 .. 0x1000E). + * a 15-bit number (0 .. 0x7FFF). The sum is a 17-bit number (0 .. 0x17FFE). */ r = (r & 0xFFFF) + (r >> 16); /* When the input r is (0 .. 0xFFFF), the output r is equal to the input * r, so the output is (0 .. 0xFFFF). When the input r is (0x10000 .. - * 0x1001E), the output r is (0 .. 31). So no carry bit can be + * 0x17FFE), the output r is (0 .. 0x7FFF). So no carry bit can be * generated, therefore the output r is always a 16-bit number. */ r = (r & 0xFFFF) + (r >> 16); -- 2.17.1