From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Ankur Dwivedi <adwivedi@marvell.com>,
Archana Muniganti <marchana@marvell.com>,
Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 1/5] common/cnxk: add err ctl
Date: Mon, 31 Jan 2022 18:00:25 +0530 [thread overview]
Message-ID: <20220131123029.4024-2-ktejasree@marvell.com> (raw)
In-Reply-To: <20220131123029.4024-1-ktejasree@marvell.com>
From: Anoob Joseph <anoobj@marvell.com>
Add err ctl field in SA context.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
drivers/common/cnxk/cnxk_security.c | 6 ++++--
drivers/common/cnxk/roc_ie_ot.h | 17 ++++++++++++++++-
2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c
index 6ebf0846f5..035d61180a 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -500,8 +500,10 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,
offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx);
/* Word offset for HW managed SA field */
sa->w0.s.hw_ctx_off = offset / 8;
- /* Context push size is up to hmac_opad_ipad */
- sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off;
+
+ /* Context push size is up to err ctl in HW ctx */
+ sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1;
+
/* Entire context size in 128B units */
offset = sizeof(struct roc_ot_ipsec_outb_sa);
sa->w0.s.ctx_size = (PLT_ALIGN_CEIL(offset, ROC_CTX_UNIT_128B) /
diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index 923656f4a5..c502c7983f 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -153,6 +153,13 @@ enum {
ROC_IE_OT_REAS_STS_L3P_ERR = 8,
ROC_IE_OT_REAS_STS_MAX = 9
};
+
+enum {
+ ROC_IE_OT_ERR_CTL_MODE_NONE = 0,
+ ROC_IE_OT_ERR_CTL_MODE_CLEAR = 1,
+ ROC_IE_OT_ERR_CTL_MODE_RING = 2,
+};
+
/* Context units in bytes */
#define ROC_CTX_UNIT_8B 8
#define ROC_CTX_UNIT_128B 128
@@ -235,7 +242,15 @@ union roc_ot_ipsec_outb_iv {
};
struct roc_ot_ipsec_outb_ctx_update_reg {
- uint64_t rsvd;
+ union {
+ struct {
+ uint64_t reserved_0_2 : 3;
+ uint64_t address : 57;
+ uint64_t mode : 4;
+ } s;
+ uint64_t u64;
+ } err_ctl;
+
uint64_t esn_val;
uint64_t hard_life;
uint64_t soft_life;
--
2.27.0
next prev parent reply other threads:[~2022-01-31 11:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-31 12:30 [PATCH 0/5] Adding new features and improvements in cnxk crypto PMD Tejasree Kondoj
2022-01-31 12:30 ` Tejasree Kondoj [this message]
2022-01-31 12:30 ` [PATCH 2/5] crypto/cnxk: add ESN and antireplay support Tejasree Kondoj
2022-01-31 12:30 ` [PATCH 3/5] common/cnxk: add ROC cache line size constant Tejasree Kondoj
2022-01-31 12:30 ` [PATCH 4/5] crypto/cnxk: use unique cache line per inst Tejasree Kondoj
2022-01-31 12:30 ` [PATCH 5/5] crypto/cnxk: fix updation of number of descriptors Tejasree Kondoj
2022-02-08 22:26 ` [PATCH 0/5] Adding new features and improvements in cnxk crypto PMD Akhil Goyal
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