From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BA4C2A034F; Mon, 7 Feb 2022 08:30:17 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9366B410FB; Mon, 7 Feb 2022 08:30:14 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 92A7B40DDA for ; Mon, 7 Feb 2022 08:30:12 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 216MmlZo020123 for ; Sun, 6 Feb 2022 23:30:12 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=67mSNz+Ah5/9ggJU/BdXjoBfURKAdTeEEmHk2yy1a0k=; b=Eg/Wr+Ehm1dlZ0VAKLKMC5sS9jXOPgrNWoJ0rAk5JNa9fHfwHln7cvNIQGXfoGBEmcJx D7U1Uk2i2SzIFLYGHpTHcqdDHdC5FhjsYo5dN6UMCif44wba51dRx61is9nSfk22XI6W VPZKvLqKOsdNlotZzfoKA7VOnojIHnNqzvocAFuxdosiOb6n2ZuwR0yEDbyxoqFqWabF 0+tviwTGxrwKv1/pbrdonSc1Wi/tyMl9PH/H6wf/70RXtRznqFNOVckt4U2erCWyBlZI XSu/zp4hJfRDexH4GKRU4TbWD0jHjJ+oXMkeYBC2y55I+FrMpXfDZhJZQs/7X5ZzETeI 7w== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3e1smr4p2e-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sun, 06 Feb 2022 23:30:11 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 6 Feb 2022 23:29:54 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 6 Feb 2022 23:29:54 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 92BCA3F7063; Sun, 6 Feb 2022 23:29:52 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 03/20] common/cnxk: adjust shaper rates to lower boundaries Date: Mon, 7 Feb 2022 12:59:15 +0530 Message-ID: <20220207072932.22409-3-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220207072932.22409-1-ndabilpuram@marvell.com> References: <20220207072932.22409-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: e6HJFABoCLl6Jgy3My_Gk5825RFUV7kz X-Proofpoint-ORIG-GUID: e6HJFABoCLl6Jgy3My_Gk5825RFUV7kz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-07_02,2022-02-03_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao New api to get floor values for a requested shaper rate, which can assure packets should never be transmitted at a rate higher than configured. Keep the old api to get HW suggested values. And introduce new parameter to select appropriate api. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix.h | 1 + drivers/common/cnxk/roc_nix_priv.h | 4 +- drivers/common/cnxk/roc_nix_tm_ops.c | 10 ++-- drivers/common/cnxk/roc_nix_tm_utils.c | 90 ++++++++++++++++++++++++++++++++-- 4 files changed, 96 insertions(+), 9 deletions(-) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 755212c..250e1c0 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -531,6 +531,7 @@ struct roc_nix_tm_shaper_profile { uint64_t peak_sz; int32_t pkt_len_adj; bool pkt_mode; + int8_t accuracy; /* Function to free this memory */ void (*free_fn)(void *profile); }; diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h index 4d2a7d8..ec6f106 100644 --- a/drivers/common/cnxk/roc_nix_priv.h +++ b/drivers/common/cnxk/roc_nix_priv.h @@ -95,6 +95,7 @@ struct nix_tm_shaper_profile { int32_t pkt_mode_adj; bool pkt_mode; uint32_t id; + int8_t accuracy; void (*free_fn)(void *profile); uint32_t ref_cnt; @@ -399,7 +400,8 @@ uint32_t nix_tm_check_rr(struct nix *nix, uint32_t parent_id, uint32_t *max_prio); uint64_t nix_tm_shaper_profile_rate_min(struct nix *nix); uint64_t nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p, - uint64_t *mantissa_p, uint64_t *div_exp_p); + uint64_t *mantissa_p, uint64_t *div_exp_p, + int8_t accuracy); uint64_t nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p); bool nix_tm_child_res_valid(struct nix_tm_node_list *list, diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c index 3d81247..a1f5f0e 100644 --- a/drivers/common/cnxk/roc_nix_tm_ops.c +++ b/drivers/common/cnxk/roc_nix_tm_ops.c @@ -173,8 +173,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix, if (commit_rate || commit_sz) { if (commit_sz < min_burst || commit_sz > max_burst) return NIX_ERR_TM_INVALID_COMMIT_SZ; - else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL, - NULL)) + else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL, NULL, + profile->accuracy)) return NIX_ERR_TM_INVALID_COMMIT_RATE; } @@ -182,7 +182,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix, if (peak_sz || peak_rate) { if (peak_sz < min_burst || peak_sz > max_burst) return NIX_ERR_TM_INVALID_PEAK_SZ; - else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL)) + else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL, + profile->accuracy)) return NIX_ERR_TM_INVALID_PEAK_RATE; } @@ -230,6 +231,7 @@ roc_nix_tm_shaper_profile_add(struct roc_nix *roc_nix, profile->pkt_len_adj = roc_profile->pkt_len_adj; profile->pkt_mode = roc_profile->pkt_mode; profile->free_fn = roc_profile->free_fn; + profile->accuracy = roc_profile->accuracy; return nix_tm_shaper_profile_add(roc_nix, profile, 0); } @@ -246,6 +248,8 @@ roc_nix_tm_shaper_profile_update(struct roc_nix *roc_nix, profile->peak.rate = roc_profile->peak_rate; profile->commit.size = roc_profile->commit_sz; profile->peak.size = roc_profile->peak_sz; + profile->pkt_len_adj = roc_profile->pkt_len_adj; + profile->accuracy = roc_profile->accuracy; return nix_tm_shaper_profile_add(roc_nix, profile, 1); } diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c index 9e80c2a..4ba0752 100644 --- a/drivers/common/cnxk/roc_nix_tm_utils.c +++ b/drivers/common/cnxk/roc_nix_tm_utils.c @@ -125,9 +125,72 @@ nix_tm_node_search(struct nix *nix, uint32_t node_id, enum roc_nix_tm_tree tree) return NULL; } -uint64_t -nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p, - uint64_t *mantissa_p, uint64_t *div_exp_p) +static uint64_t +nix_tm_shaper_rate_conv_floor(uint64_t value, uint64_t *exponent_p, + uint64_t *mantissa_p, uint64_t *div_exp_p) +{ + uint64_t div_exp, exponent, mantissa; + + /* Boundary checks */ + if (value < NIX_TM_MIN_SHAPER_RATE || value > NIX_TM_MAX_SHAPER_RATE) + return 0; + + if (value <= NIX_TM_SHAPER_RATE(0, 0, 0)) { + /* Calculate rate div_exp and mantissa using + * the following formula: + * + * value = (2E6 * (256 + mantissa) + * / ((1 << div_exp) * 256)) + */ + div_exp = 0; + exponent = 0; + mantissa = NIX_TM_MAX_RATE_MANTISSA; + + while (value <= (NIX_TM_SHAPER_RATE_CONST / (1 << div_exp))) + div_exp += 1; + + while (value <= ((NIX_TM_SHAPER_RATE_CONST * (256 + mantissa)) / + ((1 << div_exp) * 256))) + mantissa -= 1; + } else { + /* Calculate rate exponent and mantissa using + * the following formula: + * + * value = (2E6 * ((256 + mantissa) << exponent)) / 256 + * + */ + div_exp = 0; + exponent = NIX_TM_MAX_RATE_EXPONENT; + mantissa = NIX_TM_MAX_RATE_MANTISSA; + + while (value <= (NIX_TM_SHAPER_RATE_CONST * (1 << exponent))) + exponent -= 1; + + while (value <= ((NIX_TM_SHAPER_RATE_CONST * + ((256 + mantissa) << exponent)) / + 256)) + mantissa -= 1; + } + + if (div_exp > NIX_TM_MAX_RATE_DIV_EXP || + exponent > NIX_TM_MAX_RATE_EXPONENT || + mantissa > NIX_TM_MAX_RATE_MANTISSA) + return 0; + + if (div_exp_p) + *div_exp_p = div_exp; + if (exponent_p) + *exponent_p = exponent; + if (mantissa_p) + *mantissa_p = mantissa; + + /* Calculate real rate value */ + return NIX_TM_SHAPER_RATE(exponent, mantissa, div_exp); +} + +static uint64_t +nix_tm_shaper_rate_conv_exact(uint64_t value, uint64_t *exponent_p, + uint64_t *mantissa_p, uint64_t *div_exp_p) { uint64_t div_exp, exponent, mantissa; @@ -188,6 +251,23 @@ nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p, return NIX_TM_SHAPER_RATE(exponent, mantissa, div_exp); } +/* With zero accuracy we will tune parameters as defined by HW, + * non zero accuracy will keep the parameters close to lower values + * and make sure long term shaper rate will not exceed requested rate. + */ +uint64_t +nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p, + uint64_t *mantissa_p, uint64_t *div_exp_p, + int8_t accuracy) +{ + if (!accuracy) + return nix_tm_shaper_rate_conv_exact(value, exponent_p, + mantissa_p, div_exp_p); + + return nix_tm_shaper_rate_conv_floor(value, exponent_p, mantissa_p, + div_exp_p); +} + uint64_t nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p) @@ -245,13 +325,13 @@ nix_tm_shaper_conf_get(struct nix_tm_shaper_profile *profile, if (profile->commit.rate) cir->rate = nix_tm_shaper_rate_conv( profile->commit.rate, &cir->exponent, &cir->mantissa, - &cir->div_exp); + &cir->div_exp, profile->accuracy); /* Calculate PIR exponent and mantissa */ if (profile->peak.rate) pir->rate = nix_tm_shaper_rate_conv( profile->peak.rate, &pir->exponent, &pir->mantissa, - &pir->div_exp); + &pir->div_exp, profile->accuracy); /* Calculate CIR burst exponent and mantissa */ if (profile->commit.size) -- 2.8.4