From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1302AA034F; Mon, 7 Feb 2022 08:31:00 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 18AFA4116E; Mon, 7 Feb 2022 08:30:21 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 8E9D041147 for ; Mon, 7 Feb 2022 08:30:16 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 216LsOhE030467; Sun, 6 Feb 2022 23:30:12 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=HL/mXram0SaZZEEcib8R98uN6Dur5/cXsFIBL5eYSKw=; b=Wb/6KXwLJZ2Pybb2NGOqIcvSKGEgtuAkhF5aOxAXrHXQeqNDQUsK+asBsja4cwp9gh4v fJLzFb88LNY0eHDWilCblj3iCBg/9byIfQ8cZpoVOs8Lue1xzRT133YtuND/7OXZH7tY e1Q5iQiJbE7kxe20gl+IZ5OoX9Yp09AlFcF0Fb+0N61CRliUnidjO/1pn8BPKyc/UYh+ 8ya9fLVWEVhuJ/X/u6cNWz/QOUNEGjNyOV+z4mvYG1bZ+sxkU9G0J1dqW4FK+zI7cU4W 5X8Urp2oPOxqHk7SCCwC3jwXJRqV3969qJ3juFZh58ODc1khHitV7V3k47v/km7NJzrU gQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3e1smr4p28-7 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 06 Feb 2022 23:30:12 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 6 Feb 2022 23:30:03 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 6 Feb 2022 23:30:03 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 524053F705C; Sun, 6 Feb 2022 23:29:58 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Ray Kinsella , "Ankur Dwivedi" , Anoob Joseph , "Tejasree Kondoj" CC: , Vidya Sagar Velumuri Subject: [PATCH 05/20] common/cnxk: use common SA init API for default options Date: Mon, 7 Feb 2022 12:59:17 +0530 Message-ID: <20220207072932.22409-5-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220207072932.22409-1-ndabilpuram@marvell.com> References: <20220207072932.22409-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: P7IBi-4iA9tx7orml8xy4Q6n4h0jffIy X-Proofpoint-ORIG-GUID: P7IBi-4iA9tx7orml8xy4Q6n4h0jffIy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-07_02,2022-02-03_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vidya Sagar Velumuri Use common SA init API before doing initialization based on params. This is better so that all HW specific default values are at single place for lookaside and inline. Signed-off-by: Vidya Sagar Velumuri Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/cnxk_security.c | 21 +++++++----------- drivers/common/cnxk/cnxk_security.h | 3 ++- drivers/common/cnxk/meson.build | 1 + drivers/common/cnxk/roc_ie_ot.c | 41 +++++++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_ie_ot.h | 11 ++++++---- drivers/common/cnxk/roc_nix_inl.c | 31 ++------------------------ drivers/common/cnxk/roc_nix_inl.h | 2 -- drivers/common/cnxk/roc_nix_inl_dev.c | 2 +- drivers/common/cnxk/version.map | 4 ++-- drivers/crypto/cnxk/cn10k_ipsec.c | 3 ++- drivers/net/cnxk/cn10k_ethdev_sec.c | 7 +++--- 11 files changed, 70 insertions(+), 56 deletions(-) create mode 100644 drivers/common/cnxk/roc_ie_ot.c diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c index 8b4dd1c..8696ff3 100644 --- a/drivers/common/cnxk/cnxk_security.c +++ b/drivers/common/cnxk/cnxk_security.c @@ -260,13 +260,17 @@ ot_ipsec_inb_tunnel_hdr_fill(struct roc_ot_ipsec_inb_sa *sa, int cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa, struct rte_security_ipsec_xform *ipsec_xfrm, - struct rte_crypto_sym_xform *crypto_xfrm) + struct rte_crypto_sym_xform *crypto_xfrm, + bool is_inline) { union roc_ot_ipsec_sa_word2 w2; uint32_t replay_win_sz; size_t offset; int rc; + /* Initialize the SA */ + roc_ot_ipsec_inb_sa_init(sa, is_inline); + w2.u64 = 0; rc = ot_ipsec_sa_common_param_fill(&w2, sa->cipher_key, sa->w8.s.salt, sa->hmac_opad_ipad, ipsec_xfrm, @@ -291,13 +295,6 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa, if (rc) return rc; - /* Default options for pkt_out and pkt_fmt are with - * second pass meta and no defrag. - */ - sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META; - sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG; - sa->w0.s.pkind = ROC_OT_CPT_META_PKIND; - /* ESN */ sa->w2.s.esn_en = !!ipsec_xfrm->options.esn; if (ipsec_xfrm->options.udp_encap) { @@ -346,11 +343,6 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa, sa->w0.s.hard_life_dec = 1; } - /* There are two words of CPT_CTX_HW_S for ucode to skip */ - sa->w0.s.ctx_hdr_size = 1; - sa->w0.s.aop_valid = 1; - sa->w0.s.et_ovrwr = 1; - rte_wmb(); /* Enable SA */ @@ -368,6 +360,9 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa, size_t offset; int rc; + /* Initialize the SA */ + roc_ot_ipsec_outb_sa_init(sa); + w2.u64 = 0; rc = ot_ipsec_sa_common_param_fill(&w2, sa->cipher_key, sa->iv.s.salt, sa->hmac_opad_ipad, ipsec_xfrm, diff --git a/drivers/common/cnxk/cnxk_security.h b/drivers/common/cnxk/cnxk_security.h index db97887..02cdad2 100644 --- a/drivers/common/cnxk/cnxk_security.h +++ b/drivers/common/cnxk/cnxk_security.h @@ -38,7 +38,8 @@ cnxk_ipsec_outb_roundup_byte(enum rte_crypto_cipher_algorithm c_algo, int __roc_api cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa, struct rte_security_ipsec_xform *ipsec_xfrm, - struct rte_crypto_sym_xform *crypto_xfrm); + struct rte_crypto_sym_xform *crypto_xfrm, + bool is_inline); int __roc_api cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa, struct rte_security_ipsec_xform *ipsec_xfrm, diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 7e27b3c..928500b 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -23,6 +23,7 @@ sources = files( 'roc_hash.c', 'roc_idev.c', 'roc_irq.c', + 'roc_ie_ot.c', 'roc_mbox.c', 'roc_model.c', 'roc_nix.c', diff --git a/drivers/common/cnxk/roc_ie_ot.c b/drivers/common/cnxk/roc_ie_ot.c new file mode 100644 index 0000000..1ea7bfd --- /dev/null +++ b/drivers/common/cnxk/roc_ie_ot.c @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2022 Marvell. + */ + +#include "roc_api.h" +#include "roc_priv.h" + +void +roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa, bool is_inline) +{ + size_t offset; + + memset(sa, 0, sizeof(struct roc_ot_ipsec_inb_sa)); + + if (is_inline) { + sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG; + sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META; + sa->w0.s.pkind = ROC_IE_OT_CPT_PKIND; + sa->w0.s.et_ovrwr = 1; + } + + offset = offsetof(struct roc_ot_ipsec_inb_sa, ctx); + sa->w0.s.hw_ctx_off = offset / ROC_CTX_UNIT_8B; + sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1; + sa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN; + sa->w0.s.ctx_hdr_size = ROC_IE_OT_SA_CTX_HDR_SIZE; + sa->w0.s.aop_valid = 1; +} + +void +roc_ot_ipsec_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa) +{ + size_t offset; + + memset(sa, 0, sizeof(struct roc_ot_ipsec_outb_sa)); + + offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx); + sa->w0.s.ctx_push_size = (offset / ROC_CTX_UNIT_8B) + 1; + sa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN; + sa->w0.s.aop_valid = 1; +} diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h index 5b61902..2b4f5d3 100644 --- a/drivers/common/cnxk/roc_ie_ot.h +++ b/drivers/common/cnxk/roc_ie_ot.h @@ -1,13 +1,10 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(C) 2021 Marvell. + * Copyright(C) 2022 Marvell. */ #ifndef __ROC_IE_OT_H__ #define __ROC_IE_OT_H__ -/* PKIND to be used for CPT Meta parsing */ -#define ROC_OT_CPT_META_PKIND 58 - /* CN10K IPSEC opcodes */ #define ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x28UL #define ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x29UL @@ -16,6 +13,9 @@ #define ROC_IE_OT_MINOR_OP_WRITE_SA 0x09UL #define ROC_IE_OT_CTX_ILEN 2 +/* PKIND to be used for CPT Meta parsing */ +#define ROC_IE_OT_CPT_PKIND 58 +#define ROC_IE_OT_SA_CTX_HDR_SIZE 1 enum roc_ie_ot_ucc_ipsec { ROC_IE_OT_UCC_SUCCESS = 0x00, @@ -517,4 +517,7 @@ PLT_STATIC_ASSERT(offsetof(struct roc_ot_ipsec_outb_sa, hmac_opad_ipad) == PLT_STATIC_ASSERT(offsetof(struct roc_ot_ipsec_outb_sa, ctx) == 31 * sizeof(uint64_t)); +void __roc_api roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa, + bool is_inline); +void __roc_api roc_ot_ipsec_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa); #endif /* __ROC_IE_OT_H__ */ diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index 356d11d..f57f1a4 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -43,7 +43,7 @@ nix_inl_inb_sa_tbl_setup(struct roc_nix *roc_nix) if (roc_model_is_cn10k()) { for (i = 0; i < ipsec_in_max_spi; i++) { sa = ((uint8_t *)nix->inb_sa_base) + (i * inb_sa_sz); - roc_nix_inl_inb_sa_init(sa); + roc_ot_ipsec_inb_sa_init(sa, true); } } @@ -401,7 +401,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix) if (roc_model_is_cn10k()) { for (i = 0; i < roc_nix->ipsec_out_max_sa; i++) { sa = ((uint8_t *)sa_base) + (i * sa_sz); - roc_nix_inl_outb_sa_init(sa); + roc_ot_ipsec_outb_sa_init(sa); } } nix->outb_sa_base = sa_base; @@ -867,33 +867,6 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, } void -roc_nix_inl_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa) -{ - size_t offset; - - memset(sa, 0, sizeof(struct roc_ot_ipsec_inb_sa)); - - offset = offsetof(struct roc_ot_ipsec_inb_sa, ctx); - sa->w0.s.hw_ctx_off = offset / ROC_CTX_UNIT_8B; - sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1; - sa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN; - sa->w0.s.aop_valid = 1; -} - -void -roc_nix_inl_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa) -{ - size_t offset; - - memset(sa, 0, sizeof(struct roc_ot_ipsec_outb_sa)); - - offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx); - sa->w0.s.ctx_push_size = (offset / ROC_CTX_UNIT_8B); - sa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN; - sa->w0.s.aop_valid = 1; -} - -void roc_nix_inl_dev_lock(void) { struct idev_cfg *idev = idev_get_cfg(); diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h index ceeccab..224aaba 100644 --- a/drivers/common/cnxk/roc_nix_inl.h +++ b/drivers/common/cnxk/roc_nix_inl.h @@ -171,7 +171,5 @@ int __roc_api roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb, enum roc_nix_inl_sa_sync_op op); int __roc_api roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, bool inb, uint16_t sa_len); -void __roc_api roc_nix_inl_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa); -void __roc_api roc_nix_inl_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa); #endif /* _ROC_NIX_INL_H_ */ diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c index 12160e9..9dc0a62 100644 --- a/drivers/common/cnxk/roc_nix_inl_dev.c +++ b/drivers/common/cnxk/roc_nix_inl_dev.c @@ -397,7 +397,7 @@ nix_inl_nix_setup(struct nix_inl_dev *inl_dev) for (i = 0; i < ipsec_in_max_spi; i++) { sa = ((uint8_t *)inl_dev->inb_sa_base) + (i * inb_sa_sz); - roc_nix_inl_inb_sa_init(sa); + roc_ot_ipsec_inb_sa_init(sa, true); } } /* Setup device specific inb SA table */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 4f98a38..a5ea244 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -157,8 +157,6 @@ INTERNAL { roc_nix_inl_sa_sync; roc_nix_inl_ctx_write; roc_nix_inl_dev_pffunc_get; - roc_nix_inl_inb_sa_init; - roc_nix_inl_outb_sa_init; roc_nix_cpt_ctx_cache_sync; roc_nix_is_lbk; roc_nix_is_pf; @@ -322,6 +320,8 @@ INTERNAL { roc_npc_mcam_read_counter; roc_npc_profile_name_get; roc_npc_validate_portid_action; + roc_ot_ipsec_inb_sa_init; + roc_ot_ipsec_outb_sa_init; roc_plt_init; roc_plt_init_cb_register; roc_sso_dev_fini; diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c index 27df1dc..308e518 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec.c +++ b/drivers/crypto/cnxk/cn10k_ipsec.c @@ -128,7 +128,8 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, in_sa = &sa->in_sa; /* Translate security parameters to SA */ - ret = cnxk_ot_ipsec_inb_sa_fill(in_sa, ipsec_xfrm, crypto_xfrm); + ret = cnxk_ot_ipsec_inb_sa_fill(in_sa, ipsec_xfrm, crypto_xfrm, + false); if (ret) return ret; diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 12cec0a..6fbf444 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -319,7 +319,8 @@ cn10k_eth_sec_session_create(void *device, memset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa)); /* Fill inbound sa params */ - rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto); + rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto, + true); if (rc) { snprintf(tbuf, sizeof(tbuf), "Failed to init inbound sa, rc=%d", rc); @@ -464,7 +465,7 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess) if (eth_sec->inb) { /* Disable SA */ sa_dptr = dev->inb.sa_dptr; - roc_nix_inl_inb_sa_init(sa_dptr); + roc_ot_ipsec_inb_sa_init(sa_dptr, true); roc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa, eth_sec->inb, @@ -474,7 +475,7 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess) } else { /* Disable SA */ sa_dptr = dev->outb.sa_dptr; - roc_nix_inl_outb_sa_init(sa_dptr); + roc_ot_ipsec_outb_sa_init(sa_dptr); roc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa, eth_sec->inb, -- 2.8.4