From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8B15FA04AD; Tue, 8 Feb 2022 11:05:40 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1BAF941165; Tue, 8 Feb 2022 11:05:20 +0100 (CET) Received: from smtpproxy21.qq.com (smtpbg704.qq.com [203.205.195.105]) by mails.dpdk.org (Postfix) with ESMTP id 2ABD141159 for ; Tue, 8 Feb 2022 11:05:17 +0100 (CET) X-QQ-mid: bizesmtp46t1644314712ts77djil Received: from wxdbg.localdomain.com (unknown [183.129.236.74]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 08 Feb 2022 18:05:11 +0800 (CST) X-QQ-SSF: 01400000002000F0L000B00A0000000 X-QQ-FEAT: XiHsc86esFPvmmn2YN0EWW/ljknav2cnlYqCQ3UVPlgkkEfaeFuOwCmms4IYz kjYVU5AOSteqUZEhtv2KR6VUv50cLsuVMh4m5quGwVcOiEHtZ7gQz+a21TupxFJeiy4H1o/ lLeJypH5ZTBvU8Wn0UMTJNM/XWZDN6N2rpWs3Z0soORAMSojZPELLyf7pO7TOYyXFh2dCcp Y8nrojnKelLXLKMat2JHJQb4B/pyB/cyMU3OPcAjJofPdkYKfKOKvRsRuyRXtLAC+KyAWfO q5LajbTHuh6n+tbXSEar5wu7/dUIVpRNYVSg554hwK96Vq6qc+/YO57BG9paw82Kt1OurjE EE3gyGfZsh6u6+87NmW6FIwPqkpYt10cMl6pr8J X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH 7/9] net: add LED OEM support for wangxun devices Date: Tue, 8 Feb 2022 18:11:27 +0800 Message-Id: <20220208101129.69173-8-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220208101129.69173-1-jiawenwu@trustnetic.com> References: <20220208101129.69173-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign1 X-QQ-Bgrelay: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support custom LED OEM for ngbe and txgbe driver. Signed-off-by: Jiawen Wu --- doc/guides/rel_notes/release_22_03.rst | 5 ++ drivers/net/ngbe/base/ngbe_dummy.h | 5 ++ drivers/net/ngbe/base/ngbe_hw.c | 1 + drivers/net/ngbe/base/ngbe_mng.c | 49 ++++++++++++++++++ drivers/net/ngbe/base/ngbe_mng.h | 3 ++ drivers/net/ngbe/base/ngbe_phy_mvl.c | 26 ++++++---- drivers/net/ngbe/base/ngbe_phy_rtl.c | 34 +++++++++---- drivers/net/ngbe/base/ngbe_type.h | 2 + drivers/net/ngbe/ngbe_ethdev.c | 7 +++ drivers/net/txgbe/base/txgbe_hw.c | 21 ++++---- drivers/net/txgbe/base/txgbe_mng.c | 69 ++++++++++++++++++++++++++ drivers/net/txgbe/base/txgbe_mng.h | 7 +++ drivers/net/txgbe/base/txgbe_regs.h | 12 +++-- drivers/net/txgbe/txgbe_ethdev.c | 4 +- 14 files changed, 209 insertions(+), 36 deletions(-) diff --git a/doc/guides/rel_notes/release_22_03.rst b/doc/guides/rel_notes/release_22_03.rst index 3b2517f4c3..76df76d96c 100644 --- a/doc/guides/rel_notes/release_22_03.rst +++ b/doc/guides/rel_notes/release_22_03.rst @@ -72,6 +72,11 @@ New Features * **Updated Wangxun ngbe driver.** * Added support for devices of custom PHY interfaces. + * Added LED OEM support. + +* **Updated Wangxun txgbe driver.** + + * Added LED OEM support. * **Added an API to retrieve event port id of ethdev Rx adapter.** diff --git a/drivers/net/ngbe/base/ngbe_dummy.h b/drivers/net/ngbe/base/ngbe_dummy.h index d74c9f7b54..836206e325 100644 --- a/drivers/net/ngbe/base/ngbe_dummy.h +++ b/drivers/net/ngbe/base/ngbe_dummy.h @@ -251,6 +251,10 @@ static inline s32 ngbe_set_phy_pause_adv_dummy(struct ngbe_hw *TUP0, u16 TUP1) { return NGBE_ERR_OPS_DUMMY; } +static inline s32 ngbe_phy_led_oem_chk_dummy(struct ngbe_hw *TUP0, u32 *TUP1) +{ + return NGBE_ERR_OPS_DUMMY; +} /* struct ngbe_mbx_operations */ static inline void ngbe_mbx_init_params_dummy(struct ngbe_hw *TUP0) @@ -332,6 +336,7 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw) hw->phy.get_adv_pause = ngbe_get_phy_advertised_pause_dummy; hw->phy.get_lp_adv_pause = ngbe_get_phy_lp_advertised_pause_dummy; hw->phy.set_pause_adv = ngbe_set_phy_pause_adv_dummy; + hw->phy.led_oem_chk = ngbe_phy_led_oem_chk_dummy; hw->mbx.init_params = ngbe_mbx_init_params_dummy; hw->mbx.read = ngbe_mbx_read_dummy; hw->mbx.write = ngbe_mbx_write_dummy; diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c index 0eab3f59e1..ac0c709085 100644 --- a/drivers/net/ngbe/base/ngbe_hw.c +++ b/drivers/net/ngbe/base/ngbe_hw.c @@ -1972,6 +1972,7 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw) phy->read_reg_unlocked = ngbe_read_phy_reg_mdi; phy->write_reg_unlocked = ngbe_write_phy_reg_mdi; phy->reset_hw = ngbe_reset_phy; + phy->led_oem_chk = ngbe_phy_led_oem_chk; /* MAC */ mac->init_hw = ngbe_init_hw; diff --git a/drivers/net/ngbe/base/ngbe_mng.c b/drivers/net/ngbe/base/ngbe_mng.c index 68e06e2c24..c6f4dc2e0b 100644 --- a/drivers/net/ngbe/base/ngbe_mng.c +++ b/drivers/net/ngbe/base/ngbe_mng.c @@ -338,3 +338,52 @@ s32 ngbe_hic_check_cap(struct ngbe_hw *hw) return err; } + +s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data) +{ + struct ngbe_hic_read_shadow_ram command; + s32 err; + int i; + + DEBUGFUNC("\n"); + + command.hdr.req.cmd = FW_PHY_LED_CONF; + command.hdr.req.buf_lenh = 0; + command.hdr.req.buf_lenl = 0; + command.hdr.req.checksum = FW_DEFAULT_CHECKSUM; + + /* convert offset from words to bytes */ + command.address = 0; + /* one word */ + command.length = 0; + + for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) { + err = ngbe_host_interface_command(hw, (u32 *)&command, + sizeof(command), + NGBE_HI_COMMAND_TIMEOUT, true); + if (err) + continue; + + command.hdr.rsp.ret_status &= 0x1F; + if (command.hdr.rsp.ret_status != + FW_CEM_RESP_STATUS_SUCCESS) + err = NGBE_ERR_HOST_INTERFACE_COMMAND; + + break; + } + + if (err) + return err; + + if (command.address == FW_CHECKSUM_CAP_ST_PASS) { + *data = ((u32 *)&command)[2]; + err = 0; + } else if (command.address == FW_CHECKSUM_CAP_ST_FAIL) { + *data = FW_CHECKSUM_CAP_ST_FAIL; + err = -1; + } else { + err = NGBE_ERR_EEPROM_CHECKSUM; + } + + return err; +} diff --git a/drivers/net/ngbe/base/ngbe_mng.h b/drivers/net/ngbe/base/ngbe_mng.h index 321338a051..36257d6e5e 100644 --- a/drivers/net/ngbe/base/ngbe_mng.h +++ b/drivers/net/ngbe/base/ngbe_mng.h @@ -26,6 +26,7 @@ #define FW_DEFAULT_CHECKSUM 0xFF /* checksum always 0xFF */ #define FW_NVM_DATA_OFFSET 3 #define FW_EEPROM_CHECK_STATUS 0xE9 +#define FW_PHY_LED_CONF 0xF1 #define FW_CHECKSUM_CAP_ST_PASS 0x80658383 #define FW_CHECKSUM_CAP_ST_FAIL 0x70657376 @@ -101,4 +102,6 @@ s32 ngbe_hic_pcie_read(struct ngbe_hw *hw, u16 addr, u32 *buf, int len); s32 ngbe_hic_pcie_write(struct ngbe_hw *hw, u16 addr, u32 *buf, int len); s32 ngbe_hic_check_cap(struct ngbe_hw *hw); +s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data); + #endif /* _NGBE_MNG_H_ */ diff --git a/drivers/net/ngbe/base/ngbe_phy_mvl.c b/drivers/net/ngbe/base/ngbe_phy_mvl.c index 8a4df90a42..01cb6b9bb3 100644 --- a/drivers/net/ngbe/base/ngbe_phy_mvl.c +++ b/drivers/net/ngbe/base/ngbe_phy_mvl.c @@ -123,16 +123,9 @@ s32 ngbe_init_phy_mvl(struct ngbe_hw *hw) value = MVL_INTR_EN_ANC | MVL_INTR_EN_LSC; hw->phy.write_reg(hw, MVL_INTR_EN, 0, value); - /* LED control */ - ngbe_write_phy_reg_mdi(hw, MVL_PAGE_SEL, 0, 3); - ngbe_read_phy_reg_mdi(hw, MVL_LEDFCR, 0, &value); - value &= ~(MVL_LEDFCR_CTL0 | MVL_LEDFCR_CTL1); - value |= MVL_LEDFCR_CTL0_CONF | MVL_LEDFCR_CTL1_CONF; - ngbe_write_phy_reg_mdi(hw, MVL_LEDFCR, 0, value); - ngbe_read_phy_reg_mdi(hw, MVL_LEDPCR, 0, &value); - value &= ~(MVL_LEDPCR_CTL0 | MVL_LEDPCR_CTL1); - value |= MVL_LEDPCR_CTL0_CONF | MVL_LEDPCR_CTL1_CONF; - ngbe_write_phy_reg_mdi(hw, MVL_LEDPCR, 0, value); + ngbe_read_phy_reg_mdi(hw, MVL_CTRL, 0, &value); + value |= MVL_CTRL_PWDN; + ngbe_write_phy_reg_mdi(hw, MVL_CTRL, 0, value); return ret_val; } @@ -147,6 +140,19 @@ s32 ngbe_setup_phy_link_mvl(struct ngbe_hw *hw, u32 speed, DEBUGFUNC("ngbe_setup_phy_link_mvl"); UNREFERENCED_PARAMETER(autoneg_wait_to_complete); + if (hw->led_conf == 0xFFFF) { + /* LED control */ + ngbe_write_phy_reg_mdi(hw, MVL_PAGE_SEL, 0, 3); + ngbe_read_phy_reg_mdi(hw, MVL_LEDFCR, 0, &value); + value &= ~(MVL_LEDFCR_CTL0 | MVL_LEDFCR_CTL1); + value |= MVL_LEDFCR_CTL0_CONF | MVL_LEDFCR_CTL1_CONF; + ngbe_write_phy_reg_mdi(hw, MVL_LEDFCR, 0, value); + ngbe_read_phy_reg_mdi(hw, MVL_LEDPCR, 0, &value); + value &= ~(MVL_LEDPCR_CTL0 | MVL_LEDPCR_CTL1); + value |= MVL_LEDPCR_CTL0_CONF | MVL_LEDPCR_CTL1_CONF; + ngbe_write_phy_reg_mdi(hw, MVL_LEDPCR, 0, value); + } + hw->phy.autoneg_advertised = 0; if (hw->phy.type == ngbe_phy_mvl) { diff --git a/drivers/net/ngbe/base/ngbe_phy_rtl.c b/drivers/net/ngbe/base/ngbe_phy_rtl.c index c59efe3153..f49d829dff 100644 --- a/drivers/net/ngbe/base/ngbe_phy_rtl.c +++ b/drivers/net/ngbe/base/ngbe_phy_rtl.c @@ -36,6 +36,30 @@ s32 ngbe_write_phy_reg_rtl(struct ngbe_hw *hw, return 0; } +static void ngbe_phy_led_ctrl_rtl(struct ngbe_hw *hw) +{ + u16 value = 0; + + if (hw->led_conf != 0xFFFF) + value = hw->led_conf & 0xFFFF; + else + value = 0x205B; + + hw->phy.write_reg(hw, RTL_LCR, 0xd04, value); + hw->phy.write_reg(hw, RTL_EEELCR, 0xd04, 0); + + hw->phy.read_reg(hw, RTL_LPCR, 0xd04, &value); + if (hw->led_conf != 0xFFFF) { + value &= ~0x73; + value |= hw->led_conf >> 16; + } else { + value &= 0xFFFC; + /*act led blinking mode set to 60ms*/ + value |= 0x2; + } + hw->phy.write_reg(hw, RTL_LPCR, 0xd04, value); +} + s32 ngbe_init_phy_rtl(struct ngbe_hw *hw) { int i; @@ -219,15 +243,7 @@ s32 ngbe_setup_phy_link_rtl(struct ngbe_hw *hw, hw->phy.write_reg(hw, RTL_BMCR, RTL_DEV_ZERO, autoneg_reg); skip_an: - autoneg_reg = 0x205B; - hw->phy.write_reg(hw, RTL_LCR, 0xd04, autoneg_reg); - hw->phy.write_reg(hw, RTL_EEELCR, 0xd04, 0); - - hw->phy.read_reg(hw, RTL_LPCR, 0xd04, &autoneg_reg); - autoneg_reg = autoneg_reg & 0xFFFC; - /* act led blinking mode set to 60ms */ - autoneg_reg |= 0x2; - hw->phy.write_reg(hw, RTL_LPCR, 0xd04, autoneg_reg); + ngbe_phy_led_ctrl_rtl(hw); return 0; } diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h index 372e1e72e6..8f6e98ad5f 100644 --- a/drivers/net/ngbe/base/ngbe_type.h +++ b/drivers/net/ngbe/base/ngbe_type.h @@ -354,6 +354,7 @@ struct ngbe_phy_info { bool autoneg_wait_to_complete); s32 (*check_link)(struct ngbe_hw *hw, u32 *speed, bool *link_up); s32 (*set_phy_power)(struct ngbe_hw *hw, bool on); + s32 (*led_oem_chk)(struct ngbe_hw *hw, u32 *data); s32 (*get_adv_pause)(struct ngbe_hw *hw, u8 *pause_bit); s32 (*get_lp_adv_pause)(struct ngbe_hw *hw, u8 *pause_bit); s32 (*set_pause_adv)(struct ngbe_hw *hw, u16 pause_bit); @@ -429,6 +430,7 @@ struct ngbe_hw { bool offset_loaded; bool is_pf; bool gpio_ctl; + u32 led_conf; struct { u64 rx_qp_packets; u64 tx_qp_packets; diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index fdf3aad4fa..33aca4ac7c 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -314,6 +314,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) struct rte_intr_handle *intr_handle = pci_dev->intr_handle; const struct rte_memzone *mz; uint32_t ctrl_ext; + u32 led_conf = 0; int err, ret; PMD_INIT_FUNC_TRACE(); @@ -401,6 +402,12 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) return -EIO; } + err = hw->phy.led_oem_chk(hw, &led_conf); + if (err == 0) + hw->led_conf = led_conf; + else + hw->led_conf = 0xFFFF; + err = hw->mac.init_hw(hw); if (err != 0) { PMD_INIT_LOG(ERR, "Hardware Initialization Failure: %d", err); diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c index 00a8db78bf..db8ffe61a4 100644 --- a/drivers/net/txgbe/base/txgbe_hw.c +++ b/drivers/net/txgbe/base/txgbe_hw.c @@ -529,12 +529,9 @@ s32 txgbe_led_on(struct txgbe_hw *hw, u32 index) DEBUGFUNC("txgbe_led_on"); - if (index > 4) - return TXGBE_ERR_PARAM; - /* To turn on the LED, set mode to ON. */ - led_reg |= TXGBE_LEDCTL_SEL(index); - led_reg |= TXGBE_LEDCTL_ORD(index); + led_reg |= index << TXGBE_LEDCTL_ORD_SHIFT; + led_reg |= index; wr32(hw, TXGBE_LEDCTL, led_reg); txgbe_flush(hw); @@ -552,12 +549,9 @@ s32 txgbe_led_off(struct txgbe_hw *hw, u32 index) DEBUGFUNC("txgbe_led_off"); - if (index > 4) - return TXGBE_ERR_PARAM; - /* To turn off the LED, set mode to OFF. */ - led_reg &= ~(TXGBE_LEDCTL_SEL(index)); - led_reg &= ~(TXGBE_LEDCTL_ORD(index)); + led_reg &= ~(index << TXGBE_LEDCTL_ORD_SHIFT); + led_reg |= index; wr32(hw, TXGBE_LEDCTL, led_reg); txgbe_flush(hw); @@ -3054,6 +3048,10 @@ void txgbe_disable_tx_laser_multispeed_fiber(struct txgbe_hw *hw) if (txgbe_check_reset_blocked(hw)) return; + if (txgbe_close_notify(hw)) + txgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_LEDCTL_10G | + TXGBE_LEDCTL_1G | TXGBE_LEDCTL_ACTIVE); + /* Disable Tx laser; allow 100us to go dark per spec */ esdp_reg |= (TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1); wr32(hw, TXGBE_GPIODATA, esdp_reg); @@ -3073,6 +3071,9 @@ void txgbe_enable_tx_laser_multispeed_fiber(struct txgbe_hw *hw) { u32 esdp_reg = rd32(hw, TXGBE_GPIODATA); + if (txgbe_open_notify(hw)) + wr32(hw, TXGBE_LEDCTL, 0); + /* Enable Tx laser; allow 100ms to light up */ esdp_reg &= ~(TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1); wr32(hw, TXGBE_GPIODATA, esdp_reg); diff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c index dbe512122c..d0aa665d4a 100644 --- a/drivers/net/txgbe/base/txgbe_mng.c +++ b/drivers/net/txgbe/base/txgbe_mng.c @@ -82,6 +82,11 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout) return TXGBE_ERR_HOST_INTERFACE_COMMAND; } + if ((rd32(hw, TXGBE_MNGMBX) & 0xff0000) >> 16 == 0x80) { + DEBUGOUT("It's unknown command.\n"); + return TXGBE_ERR_MNG_ACCESS_FAILED; + } + return 0; } @@ -262,6 +267,70 @@ s32 txgbe_hic_sr_write(struct txgbe_hw *hw, u32 addr, u8 *buf, int len) return err; } +s32 txgbe_close_notify(struct txgbe_hw *hw) +{ + u32 tmp; + s32 status; + struct txgbe_hic_write_shadow_ram buffer; + + DEBUGFUNC("txgbe_close_notify"); + + buffer.hdr.req.cmd = FW_DW_CLOSE_NOTIFY; + buffer.hdr.req.buf_lenh = 0; + buffer.hdr.req.buf_lenl = 0; + buffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM; + + /* one word */ + buffer.length = 0; + buffer.address = 0; + + status = txgbe_host_interface_command(hw, (u32 *)&buffer, + sizeof(buffer), + TXGBE_HI_COMMAND_TIMEOUT, false); + if (status) + return status; + + tmp = rd32(hw, TXGBE_MNGSWSYNC); + if (tmp == TXGBE_CHECKSUM_CAP_ST_PASS) + status = 0; + else + status = TXGBE_ERR_EEPROM_CHECKSUM; + + return status; +} + +s32 txgbe_open_notify(struct txgbe_hw *hw) +{ + u32 tmp; + s32 status; + struct txgbe_hic_write_shadow_ram buffer; + + DEBUGFUNC("txgbe_open_notify"); + + buffer.hdr.req.cmd = FW_DW_OPEN_NOTIFY; + buffer.hdr.req.buf_lenh = 0; + buffer.hdr.req.buf_lenl = 0; + buffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM; + + /* one word */ + buffer.length = 0; + buffer.address = 0; + + status = txgbe_host_interface_command(hw, (u32 *)&buffer, + sizeof(buffer), + TXGBE_HI_COMMAND_TIMEOUT, false); + if (status) + return status; + + tmp = rd32(hw, TXGBE_MNGSWSYNC); + if (tmp == TXGBE_CHECKSUM_CAP_ST_PASS) + status = 0; + else + status = TXGBE_ERR_EEPROM_CHECKSUM; + + return status; +} + /** * txgbe_hic_set_drv_ver - Sends driver version to firmware * @hw: pointer to the HW structure diff --git a/drivers/net/txgbe/base/txgbe_mng.h b/drivers/net/txgbe/base/txgbe_mng.h index 1004f41c72..24d938fecf 100644 --- a/drivers/net/txgbe/base/txgbe_mng.h +++ b/drivers/net/txgbe/base/txgbe_mng.h @@ -51,6 +51,11 @@ #define FW_PHY_TOKEN_DELAY 5 /* milliseconds */ #define FW_PHY_TOKEN_WAIT 5 /* seconds */ #define FW_PHY_TOKEN_RETRIES ((FW_PHY_TOKEN_WAIT * 1000) / FW_PHY_TOKEN_DELAY) +#define FW_DW_OPEN_NOTIFY 0xE9 +#define FW_DW_CLOSE_NOTIFY 0xEA + +#define TXGBE_CHECKSUM_CAP_ST_PASS 0x80658383 +#define TXGBE_CHECKSUM_CAP_ST_FAIL 0x70657376 /* Host Interface Command Structures */ struct txgbe_hic_hdr { @@ -168,6 +173,8 @@ struct txgbe_hic_upg_verify { s32 txgbe_hic_sr_read(struct txgbe_hw *hw, u32 addr, u8 *buf, int len); s32 txgbe_hic_sr_write(struct txgbe_hw *hw, u32 addr, u8 *buf, int len); +s32 txgbe_close_notify(struct txgbe_hw *hw); +s32 txgbe_open_notify(struct txgbe_hw *hw); s32 txgbe_hic_set_drv_ver(struct txgbe_hw *hw, u8 maj, u8 min, u8 build, u8 ver, u16 len, const char *str); diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 144047ba62..3139796911 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -302,11 +302,13 @@ #define TXGBE_TEREDOPORT 0x01441C #define TXGBE_LEDCTL 0x014424 #define TXGBE_LEDCTL_SEL_MASK MS(0, 0xFFFF) -#define TXGBE_LEDCTL_SEL(s) MS((s), 0x1) -#define TXGBE_LEDCTL_ORD_MASK MS(16, 0xFFFF) -#define TXGBE_LEDCTL_ORD(s) MS(((s)+16), 0x1) - /* s=UP(0),10G(1),1G(2),100M(3),BSY(4) */ -#define TXGBE_LEDCTL_ACTIVE (TXGBE_LEDCTL_SEL(4) | TXGBE_LEDCTL_ORD(4)) +#define TXGBE_LEDCTL_ORD_MASK MS(16, 0xFFFF) +#define TXGBE_LEDCTL_ORD_SHIFT 16 +#define TXGBE_LEDCTL_UP MS(0, 0x1) +#define TXGBE_LEDCTL_10G MS(1, 0x1) +#define TXGBE_LEDCTL_1G MS(2, 0x1) +#define TXGBE_LEDCTL_100M MS(3, 0x1) +#define TXGBE_LEDCTL_ACTIVE MS(4, 0x1) #define TXGBE_TAGTPID(i) (0x014430 + (i) * 4) /* 0-3 */ #define TXGBE_TAGTPID_LSB_MASK MS(0, 0xFFFF) #define TXGBE_TAGTPID_LSB(v) LS(v, 0, 0xFFFF) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index ac4d4e08f4..4799a60116 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -3166,7 +3166,7 @@ txgbe_dev_led_on(struct rte_eth_dev *dev) struct txgbe_hw *hw; hw = TXGBE_DEV_HW(dev); - return txgbe_led_on(hw, 4) == 0 ? 0 : -ENOTSUP; + return txgbe_led_on(hw, TXGBE_LEDCTL_ACTIVE) == 0 ? 0 : -ENOTSUP; } static int @@ -3175,7 +3175,7 @@ txgbe_dev_led_off(struct rte_eth_dev *dev) struct txgbe_hw *hw; hw = TXGBE_DEV_HW(dev); - return txgbe_led_off(hw, 4) == 0 ? 0 : -ENOTSUP; + return txgbe_led_off(hw, TXGBE_LEDCTL_ACTIVE) == 0 ? 0 : -ENOTSUP; } static int -- 2.21.0.windows.1