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From: Suanming Mou <suanmingm@nvidia.com>
To: <viacheslavo@nvidia.com>, <matan@nvidia.com>
Cc: <rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>
Subject: [PATCH 11/13] net/mlx5: add mark action
Date: Thu, 10 Feb 2022 18:29:24 +0200	[thread overview]
Message-ID: <20220210162926.20436-12-suanmingm@nvidia.com> (raw)
In-Reply-To: <20220210162926.20436-1-suanmingm@nvidia.com>

The mark action is covered by tag action internally. While it is added
the HW will add a tag to the packet. The mark value can be set as fixed
or dynamic as the action mask indicates.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
---
 drivers/net/mlx5/mlx5.h         |  3 ++
 drivers/net/mlx5/mlx5_flow.h    |  1 +
 drivers/net/mlx5/mlx5_flow_hw.c | 87 ++++++++++++++++++++++++++++++---
 3 files changed, 85 insertions(+), 6 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 6fb82bf1f3..c78dc3c431 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1529,6 +1529,9 @@ struct mlx5_priv {
 	/* HW steering global drop action. */
 	struct mlx5dr_action *hw_drop[MLX5_HW_ACTION_FLAG_MAX]
 				     [MLX5DR_TABLE_TYPE_MAX];
+	/* HW steering global drop action. */
+	struct mlx5dr_action *hw_tag[MLX5_HW_ACTION_FLAG_MAX]
+				    [MLX5DR_TABLE_TYPE_MAX];
 	struct mlx5_indexed_pool *acts_ipool; /* Action data indexed pool. */
 };
 
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 33094c8c07..8e65486a1f 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1080,6 +1080,7 @@ struct mlx5_hw_actions {
 	struct mlx5_hw_jump_action *jump; /* Jump action. */
 	struct mlx5_hrxq *tir; /* TIR action. */
 	uint32_t acts_num:4; /* Total action number. */
+	uint32_t mark:1; /* Indicate the mark action. */
 	/* Translated DR action array from action template. */
 	struct mlx5dr_rule_action rule_acts[MLX5_HW_MAX_ACTS];
 };
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index e59d812072..a754cdd084 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -31,6 +31,50 @@ static uint32_t mlx5_hw_act_flag[MLX5_HW_ACTION_FLAG_MAX]
 	},
 };
 
+/**
+ * Trim rxq flag refcnt.
+ *
+ * @param[in] dev
+ *   Pointer to the rte_eth_dev structure.
+ */
+static void
+flow_hw_rxq_flag_trim(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+	unsigned int i;
+
+	if (!priv->mark_enabled)
+		return;
+	for (i = 0; i < priv->rxqs_n; ++i) {
+		struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
+
+		rxq_ctrl->rxq.mark = 0;
+	}
+	priv->mark_enabled = 0;
+}
+
+/**
+ * Set rxq flag refcnt.
+ *
+ * @param[in] dev
+ *   Pointer to the rte_eth_dev structure.
+ */
+static void
+flow_hw_rxq_flag_set(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+	unsigned int i;
+
+	if (priv->mark_enabled)
+		return;
+	for (i = 0; i < priv->rxqs_n; ++i) {
+		struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
+
+		rxq_ctrl->rxq.mark = 1;
+	}
+	priv->mark_enabled = 1;
+}
+
 /**
  * Register destination table DR jump action.
  *
@@ -292,6 +336,20 @@ flow_hw_actions_translate(struct rte_eth_dev *dev,
 			acts->rule_acts[i++].action =
 				priv->hw_drop[!!attr->group][type];
 			break;
+		case RTE_FLOW_ACTION_TYPE_MARK:
+			acts->mark = true;
+			if (masks->conf)
+				acts->rule_acts[i].tag.value =
+					mlx5_flow_mark_set
+					(((const struct rte_flow_action_mark *)
+					(masks->conf))->id);
+			else if (__flow_hw_act_data_general_append(priv, acts,
+				actions->type, actions - action_start, i))
+				goto err;
+			acts->rule_acts[i++].action =
+				priv->hw_tag[!!attr->group][type];
+			flow_hw_rxq_flag_set(dev);
+			break;
 		case RTE_FLOW_ACTION_TYPE_JUMP:
 			if (masks->conf) {
 				uint32_t jump_group =
@@ -418,6 +476,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,
 	}
 	LIST_FOREACH(act_data, &hw_acts->act_list, next) {
 		uint32_t jump_group;
+		uint32_t tag;
 		struct mlx5_hw_jump_action *jump;
 		struct mlx5_hrxq *hrxq;
 
@@ -429,6 +488,12 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,
 			break;
 		case RTE_FLOW_ACTION_TYPE_VOID:
 			break;
+		case RTE_FLOW_ACTION_TYPE_MARK:
+			tag = mlx5_flow_mark_set
+			      (((const struct rte_flow_action_mark *)
+			      (action->conf))->id);
+			rule_acts[act_data->action_dst].tag.value = tag;
+			break;
 		case RTE_FLOW_ACTION_TYPE_JUMP:
 			jump_group = ((const struct rte_flow_action_jump *)
 						action->conf)->group;
@@ -998,6 +1063,8 @@ flow_hw_table_destroy(struct rte_eth_dev *dev,
 		__atomic_sub_fetch(&table->its[i]->refcnt,
 				   1, __ATOMIC_RELAXED);
 	for (i = 0; i < table->nb_action_templates; i++) {
+		if (table->ats[i].acts.mark)
+			flow_hw_rxq_flag_trim(dev);
 		__flow_hw_action_template_destroy(dev, &table->ats[i].acts);
 		__atomic_sub_fetch(&table->ats[i].action_template->refcnt,
 				   1, __ATOMIC_RELAXED);
@@ -1499,15 +1566,21 @@ flow_hw_configure(struct rte_eth_dev *dev,
 				(priv->dr_ctx, mlx5_hw_act_flag[i][j]);
 			if (!priv->hw_drop[i][j])
 				goto err;
+			priv->hw_tag[i][j] = mlx5dr_action_create_tag
+				(priv->dr_ctx, mlx5_hw_act_flag[i][j]);
+			if (!priv->hw_tag[i][j])
+				goto err;
 		}
 	}
 	return 0;
 err:
 	for (i = 0; i < MLX5_HW_ACTION_FLAG_MAX; i++) {
 		for (j = 0; j < MLX5DR_TABLE_TYPE_MAX; j++) {
-			if (!priv->hw_drop[i][j])
-				continue;
-			mlx5dr_action_destroy(priv->hw_drop[i][j]);
+			if (priv->hw_drop[i][j])
+				mlx5dr_action_destroy(priv->hw_drop[i][j]);
+			if (priv->hw_tag[i][j])
+				mlx5dr_action_destroy(priv->hw_tag[i][j]);
+
 		}
 	}
 	if (dr_ctx)
@@ -1556,9 +1629,11 @@ flow_hw_resource_release(struct rte_eth_dev *dev)
 	}
 	for (i = 0; i < MLX5_HW_ACTION_FLAG_MAX; i++) {
 		for (j = 0; j < MLX5DR_TABLE_TYPE_MAX; j++) {
-			if (!priv->hw_drop[i][j])
-				continue;
-			mlx5dr_action_destroy(priv->hw_drop[i][j]);
+			if (priv->hw_drop[i][j])
+				mlx5dr_action_destroy(priv->hw_drop[i][j]);
+			if (priv->hw_tag[i][j])
+				mlx5dr_action_destroy(priv->hw_tag[i][j]);
+
 		}
 	}
 	if (priv->acts_ipool) {
-- 
2.25.1


  parent reply	other threads:[~2022-02-10 16:31 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-10 16:29 [PATCH 00/13] net/mlx5: add hardware steering Suanming Mou
2022-02-10 16:29 ` [PATCH 01/13] net/mlx5: introduce hardware steering operation Suanming Mou
2022-02-10 16:29 ` [PATCH 02/13] net/mlx5: introduce hardware steering enable routine Suanming Mou
2022-02-10 16:29 ` [PATCH 03/13] net/mlx5: add port flow configuration Suanming Mou
2022-02-10 16:29 ` [PATCH 04/13] net/mlx5: add pattern template management Suanming Mou
2022-02-10 16:29 ` [PATCH 05/13] net/mlx5: add action " Suanming Mou
2022-02-10 16:29 ` [PATCH 06/13] net/mlx5: add table management Suanming Mou
2022-02-10 16:29 ` [PATCH 07/13] net/mlx5: add basic flow queue operation Suanming Mou
2022-02-10 16:29 ` [PATCH 08/13] net/mlx5: add flow flush function Suanming Mou
2022-02-10 16:29 ` [PATCH 09/13] net/mlx5: add flow jump action Suanming Mou
2022-02-10 16:29 ` [PATCH 10/13] net/mlx5: add queue and RSS action Suanming Mou
2022-02-10 16:29 ` Suanming Mou [this message]
2022-02-10 16:29 ` [PATCH 12/13] net/mlx5: add indirect action Suanming Mou
2022-02-10 16:29 ` [PATCH 13/13] net/mlx5: add header reformat action Suanming Mou
2022-02-22  8:51 ` [PATCH v2 00/14] net/mlx5: add hardware steering Suanming Mou
2022-02-22  8:51   ` [PATCH v2 01/14] net/mlx5: introduce hardware steering operation Suanming Mou
2022-02-22  8:51   ` [PATCH v2 02/14] net/mlx5: add HW steering low-level abstract code Suanming Mou
2022-02-22  8:51   ` [PATCH v2 03/14] net/mlx5: introduce hardware steering enable routine Suanming Mou
2022-02-22  8:51   ` [PATCH v2 04/14] net/mlx5: add port flow configuration Suanming Mou
2022-02-22  8:51   ` [PATCH v2 05/14] net/mlx5: add pattern template management Suanming Mou
2022-02-22  8:51   ` [PATCH v2 06/14] net/mlx5: add action " Suanming Mou
2022-02-22  8:51   ` [PATCH v2 07/14] net/mlx5: add table management Suanming Mou
2022-02-22  8:51   ` [PATCH v2 08/14] net/mlx5: add basic flow queue operation Suanming Mou
2022-02-22  8:51   ` [PATCH v2 09/14] net/mlx5: add flow flush function Suanming Mou
2022-02-22  8:51   ` [PATCH v2 10/14] net/mlx5: add flow jump action Suanming Mou
2022-02-22  8:51   ` [PATCH v2 11/14] net/mlx5: add queue and RSS action Suanming Mou
2022-02-22  8:51   ` [PATCH v2 12/14] net/mlx5: add mark action Suanming Mou
2022-02-22  8:51   ` [PATCH v2 13/14] net/mlx5: add indirect action Suanming Mou
2022-02-22  8:51   ` [PATCH v2 14/14] net/mlx5: add header reformat action Suanming Mou
2022-02-24  3:10 ` [PATCH v3 00/14] net/mlx5: add hardware steering Suanming Mou
2022-02-24  3:10   ` [PATCH v3 01/14] net/mlx5: introduce hardware steering operation Suanming Mou
2022-02-24  3:10   ` [PATCH v3 02/14] net/mlx5: add HW steering low-level abstract code Suanming Mou
2022-02-24  3:10   ` [PATCH v3 03/14] net/mlx5: introduce hardware steering enable routine Suanming Mou
2022-02-24  3:10   ` [PATCH v3 04/14] net/mlx5: add port flow configuration Suanming Mou
2022-02-24  3:10   ` [PATCH v3 05/14] net/mlx5: add pattern template management Suanming Mou
2022-02-24  3:10   ` [PATCH v3 06/14] net/mlx5: add action " Suanming Mou
2022-02-24  3:10   ` [PATCH v3 07/14] net/mlx5: add table management Suanming Mou
2022-02-24  3:10   ` [PATCH v3 08/14] net/mlx5: add basic flow queue operation Suanming Mou
2022-02-24  3:10   ` [PATCH v3 09/14] net/mlx5: add flow flush function Suanming Mou
2022-02-24  3:10   ` [PATCH v3 10/14] net/mlx5: add flow jump action Suanming Mou
2022-02-24  3:10   ` [PATCH v3 11/14] net/mlx5: add queue and RSS action Suanming Mou
2022-02-24  3:10   ` [PATCH v3 12/14] net/mlx5: add mark action Suanming Mou
2022-02-24  3:10   ` [PATCH v3 13/14] net/mlx5: add indirect action Suanming Mou
2022-02-24  3:10   ` [PATCH v3 14/14] net/mlx5: add header reformat action Suanming Mou
2022-02-24 13:40 ` [PATCH v4 00/14] net/mlx5: add hardware steering Suanming Mou
2022-02-24 13:40   ` [PATCH v4 01/14] net/mlx5: introduce hardware steering operation Suanming Mou
2022-02-24 13:40   ` [PATCH v4 02/14] net/mlx5: add HW steering low-level abstract code Suanming Mou
2022-02-24 22:57     ` Ferruh Yigit
2022-02-24 23:49       ` Suanming Mou
2022-02-24 13:40   ` [PATCH v4 03/14] net/mlx5: introduce hardware steering enable routine Suanming Mou
2022-02-24 13:40   ` [PATCH v4 04/14] net/mlx5: add port flow configuration Suanming Mou
2022-02-24 13:40   ` [PATCH v4 05/14] net/mlx5: add pattern template management Suanming Mou
2022-02-24 13:40   ` [PATCH v4 06/14] net/mlx5: add action " Suanming Mou
2022-02-24 13:40   ` [PATCH v4 07/14] net/mlx5: add table management Suanming Mou
2022-02-24 13:40   ` [PATCH v4 08/14] net/mlx5: add basic flow queue operation Suanming Mou
2022-02-24 13:40   ` [PATCH v4 09/14] net/mlx5: add flow flush function Suanming Mou
2022-02-24 13:40   ` [PATCH v4 10/14] net/mlx5: add flow jump action Suanming Mou
2022-02-24 13:40   ` [PATCH v4 11/14] net/mlx5: add queue and RSS action Suanming Mou
2022-02-24 13:40   ` [PATCH v4 12/14] net/mlx5: add mark action Suanming Mou
2022-02-24 13:40   ` [PATCH v4 13/14] net/mlx5: add indirect action Suanming Mou
2022-02-24 13:40   ` [PATCH v4 14/14] net/mlx5: add header reformat action Suanming Mou
2022-02-24 21:12   ` [PATCH v4 00/14] net/mlx5: add hardware steering Raslan Darawsheh

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