From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 81A91A00BE; Fri, 11 Feb 2022 05:50:02 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5F1F1426F5; Fri, 11 Feb 2022 05:49:39 +0100 (CET) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 7683C426F2 for ; Fri, 11 Feb 2022 05:49:36 +0100 (CET) Received: from dggeme756-chm.china.huawei.com (unknown [172.30.72.57]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4Jw1MQ032Jz9sbk for ; Fri, 11 Feb 2022 12:48:02 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggeme756-chm.china.huawei.com (10.3.19.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.21; Fri, 11 Feb 2022 12:49:34 +0800 From: "Min Hu (Connor)" To: CC: "Min Hu (Connor)" , Yisen Zhuang , Lijun Ou Subject: [PATCH 6/9] net/hns3: dump VLAN configuration info Date: Fri, 11 Feb 2022 12:49:27 +0800 Message-ID: <20220211044930.2449-7-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220211044930.2449-1-humin29@huawei.com> References: <20220211044930.2449-1-humin29@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggeme756-chm.china.huawei.com (10.3.19.102) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch dump VLAN filter, strip related info and Pvid info for debug. Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev_dump.c | 196 ++++++++++++++++++++++++++++ 1 file changed, 196 insertions(+) diff --git a/drivers/net/hns3/hns3_ethdev_dump.c b/drivers/net/hns3/hns3_ethdev_dump.c index f9647e6007..a08f8418a2 100644 --- a/drivers/net/hns3/hns3_ethdev_dump.c +++ b/drivers/net/hns3/hns3_ethdev_dump.c @@ -361,6 +361,201 @@ get_rxtx_queue_info(FILE *file, struct rte_eth_dev *dev) get_rxtx_queue_enable_state(file, dev); } +static int +get_vlan_filter_cfg(FILE *file, struct hns3_hw *hw) +{ +#define HNS3_FILTER_TYPE_VF 0 +#define HNS3_FILTER_TYPE_PORT 1 +#define HNS3_FILTER_FE_NIC_INGRESS_B BIT(0) +#define HNS3_FILTER_FE_NIC_EGRESS_B BIT(1) + struct hns3_vlan_filter_ctrl_cmd *req; + struct hns3_cmd_desc desc; + uint8_t i; + int ret; + + static const uint32_t vlan_filter_type[] = { + HNS3_FILTER_TYPE_PORT, + HNS3_FILTER_TYPE_VF + }; + + for (i = 0; i < RTE_DIM(vlan_filter_type); i++) { + hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_FILTER_CTRL, + true); + req = (struct hns3_vlan_filter_ctrl_cmd *)desc.data; + req->vlan_type = vlan_filter_type[i]; + req->vf_id = HNS3_PF_FUNC_ID; + ret = hns3_cmd_send(hw, &desc, 1); + if (ret != 0) { + hns3_err(hw, + "NIC IMP exec ret=%d desc_num=%d optcode=0x%x!", + ret, 1, rte_le_to_cpu_16(desc.opcode)); + return ret; + } + fprintf(file, + "\t -- %s VLAN filter configuration\n" + "\t nic_ingress :%s\n" + "\t nic_egress :%s\n", + req->vlan_type == HNS3_FILTER_TYPE_PORT ? + "Port" : "VF", + req->vlan_fe & HNS3_FILTER_FE_NIC_INGRESS_B ? + "Enable" : "Disable", + req->vlan_fe & HNS3_FILTER_FE_NIC_EGRESS_B ? + "Enable" : "Disable"); + } + + return 0; +} + +static int +get_vlan_rx_offload_cfg(FILE *file, struct hns3_hw *hw) +{ + struct hns3_vport_vtag_rx_cfg_cmd *req; + struct hns3_cmd_desc desc; + uint16_t vport_id; + uint8_t bitmap; + int ret; + + hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_PORT_RX_CFG, true); + req = (struct hns3_vport_vtag_rx_cfg_cmd *)desc.data; + vport_id = HNS3_PF_FUNC_ID; + req->vf_offset = vport_id / HNS3_VF_NUM_PER_CMD; + bitmap = 1 << (vport_id % HNS3_VF_NUM_PER_BYTE); + req->vf_bitmap[req->vf_offset] = bitmap; + + /* + * current version VF is not supported when PF is driven by DPDK driver, + * just need to configure rx parameters for PF vport. + */ + ret = hns3_cmd_send(hw, &desc, 1); + if (ret != 0) { + hns3_err(hw, + "NIC IMP exec ret=%d desc_num=%d optcode=0x%x!", + ret, 1, rte_le_to_cpu_16(desc.opcode)); + return ret; + } + + fprintf(file, + "\t -- RX VLAN configuration\n" + "\t vlan1_strip_en :%s\n" + "\t vlan2_strip_en :%s\n" + "\t vlan1_vlan_prionly :%s\n" + "\t vlan2_vlan_prionly :%s\n" + "\t vlan1_strip_discard :%s\n" + "\t vlan2_strip_discard :%s\n", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_REM_TAG1_EN_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_REM_TAG2_EN_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_SHOW_TAG1_EN_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_SHOW_TAG2_EN_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_DISCARD_TAG1_EN_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_DISCARD_TAG2_EN_B) ? "Enable" : "Disable"); + + return 0; +} + +static void +parse_tx_vlan_cfg(FILE *file, struct hns3_vport_vtag_tx_cfg_cmd *req) +{ +#define VLAN_VID_MASK 0x0fff +#define VLAN_PRIO_SHIFT 13 + + fprintf(file, + "\t -- TX VLAN configuration\n" + "\t accept_tag1 :%s\n" + "\t accept_untag1 :%s\n" + "\t insert_tag1_en :%s\n" + "\t default_vlan_tag1 = %d, qos = %d\n" + "\t accept_tag2 :%s\n" + "\t accept_untag2 :%s\n" + "\t insert_tag2_en :%s\n" + "\t default_vlan_tag2 = %d, qos = %d\n" + "\t vlan_shift_mode :%s\n", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_ACCEPT_TAG1_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_ACCEPT_UNTAG1_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_PORT_INS_TAG1_EN_B) ? "Enable" : "Disable", + req->def_vlan_tag1 & VLAN_VID_MASK, + req->def_vlan_tag1 >> VLAN_PRIO_SHIFT, + hns3_get_bit(req->vport_vlan_cfg, + HNS3_ACCEPT_TAG2_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_ACCEPT_UNTAG2_B) ? "Enable" : "Disable", + hns3_get_bit(req->vport_vlan_cfg, + HNS3_PORT_INS_TAG2_EN_B) ? "Enable" : "Disable", + req->def_vlan_tag2 & VLAN_VID_MASK, + req->def_vlan_tag2 >> VLAN_PRIO_SHIFT, + hns3_get_bit(req->vport_vlan_cfg, + HNS3_TAG_SHIFT_MODE_EN_B) ? "Enable" : + "Disable"); +} + +static int +get_vlan_tx_offload_cfg(FILE *file, struct hns3_hw *hw) +{ + struct hns3_vport_vtag_tx_cfg_cmd *req; + struct hns3_cmd_desc desc; + uint16_t vport_id; + uint8_t bitmap; + int ret; + + hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_PORT_TX_CFG, true); + req = (struct hns3_vport_vtag_tx_cfg_cmd *)desc.data; + vport_id = HNS3_PF_FUNC_ID; + req->vf_offset = vport_id / HNS3_VF_NUM_PER_CMD; + bitmap = 1 << (vport_id % HNS3_VF_NUM_PER_BYTE); + req->vf_bitmap[req->vf_offset] = bitmap; + /* + * current version VF is not supported when PF is driven by DPDK driver, + * just need to configure tx parameters for PF vport. + */ + ret = hns3_cmd_send(hw, &desc, 1); + if (ret != 0) { + hns3_err(hw, + "NIC IMP exec ret=%d desc_num=%d optcode=0x%x!", + ret, 1, rte_le_to_cpu_16(desc.opcode)); + return ret; + } + + parse_tx_vlan_cfg(file, req); + + return 0; +} + +static void +get_port_pvid_info(FILE *file, struct hns3_hw *hw) +{ + fprintf(file, "\t -- pvid status: %s\n", + hw->port_base_vlan_cfg.state ? "on" : "off"); +} + +static void +get_vlan_config_info(FILE *file, struct hns3_hw *hw) +{ + int ret; + + fprintf(file, " - VLAN Config Info:\n"); + ret = get_vlan_filter_cfg(file, hw); + if (ret < 0) + return; + + ret = get_vlan_rx_offload_cfg(file, hw); + if (ret < 0) + return; + + ret = get_vlan_tx_offload_cfg(file, hw); + if (ret < 0) + return; + + get_port_pvid_info(file, hw); +} + int hns3_eth_dev_priv_dump(struct rte_eth_dev *dev, FILE *file) { @@ -376,6 +571,7 @@ hns3_eth_dev_priv_dump(struct rte_eth_dev *dev, FILE *file) get_dev_mac_info(file, hns); get_rxtx_queue_info(file, dev); + get_vlan_config_info(file, hw); return 0; } -- 2.33.0