From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 163FAA034C; Tue, 22 Feb 2022 20:36:43 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5A2A741156; Tue, 22 Feb 2022 20:36:00 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B5E99411B6; Tue, 22 Feb 2022 20:35:56 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21MIhAFP019975; Tue, 22 Feb 2022 11:35:56 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=7D9sXjjRYZ+eApjfqD2tz1bG/fMcV5Fep2ywy2WTyjo=; b=fD1P94sjlB4by3vY0DNtEsmVYMekdP4/jw8fimgtQeSzJD+udsoONuB/W98Qaud3nVZW S47b17q+cN7ZbYapjB6JNZ+cOjMU+S9dpVcV8W/pzjD8rj1ZkVRBKSjP0IGopESS+Gxz O28cKyISrGdx0o0At4yZs/3RFXk3oVQ6+Xx2tixs1U5qKWwI0ozSf5vyUHUCShj6ZHmY MTiL/U5MFQZxB0Gq3Vm2qB4b553CNJXufUC2zMvccP3zRxNmH58lfjmML+GY85paIFra kSyrRN3lqCiW/XtRhENsjnTMlQZ8X0mg2Y6Fp1sU3EEm8EmbA4jxRNF0YA62Yv20HP2Z Wg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3ecwaxar3x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 22 Feb 2022 11:35:55 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 22 Feb 2022 11:35:54 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 22 Feb 2022 11:35:54 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id D0EDF3F707D; Tue, 22 Feb 2022 11:35:51 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Anatoly Burakov CC: , Subject: [PATCH v2 13/21] net/cnxk: register callback early to handle initial packets Date: Wed, 23 Feb 2022 01:05:04 +0530 Message-ID: <20220222193512.19292-13-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220222193512.19292-1-ndabilpuram@marvell.com> References: <20220207072932.22409-1-ndabilpuram@marvell.com> <20220222193512.19292-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: Fj_3PwPKZCrQ4psf11DlrL6GXQwYEN7X X-Proofpoint-ORIG-GUID: Fj_3PwPKZCrQ4psf11DlrL6GXQwYEN7X X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-22_06,2022-02-21_02,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Register callback early to handle initial error packets from inline device. Fixes: 69daa9e5022b ("net/cnxk: support inline security setup for cn10k") Cc: stable@dpdk.org Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_ethdev.c | 6 ++++++ drivers/net/cnxk/cn10k_ethdev.h | 3 +++ drivers/net/cnxk/cn10k_ethdev_sec.c | 5 +---- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index 6bf8275..e47e04d 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -294,6 +294,12 @@ cn10k_nix_configure(struct rte_eth_dev *eth_dev) if (rc) return rc; + if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY || + dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) { + /* Register callback to handle security error work */ + roc_nix_inl_cb_register(cn10k_eth_sec_sso_work_cb, NULL); + } + /* Update offload flags */ dev->rx_offload_flags = nix_rx_offload_flags(eth_dev); dev->tx_offload_flags = nix_tx_offload_flags(eth_dev); diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h index ec40e53..fd72730 100644 --- a/drivers/net/cnxk/cn10k_ethdev.h +++ b/drivers/net/cnxk/cn10k_ethdev.h @@ -81,6 +81,9 @@ void cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev); /* Security context setup */ void cn10k_eth_sec_ops_override(void); +/* SSO Work callback */ +void cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args); + #define LMT_OFF(lmt_addr, lmt_num, offset) \ (void *)((uintptr_t)(lmt_addr) + \ ((uint64_t)(lmt_num) << ROC_LMT_LINE_SIZE_LOG2) + (offset)) diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 6fbf444..ac45056 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -138,7 +138,7 @@ static const struct rte_security_capability cn10k_eth_sec_capabilities[] = { } }; -static void +void cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args) { struct rte_eth_event_ipsec_desc desc; @@ -251,9 +251,6 @@ cn10k_eth_sec_session_create(void *device, if (rte_security_dynfield_register() < 0) return -ENOTSUP; - if (rte_eal_process_type() == RTE_PROC_PRIMARY) - roc_nix_inl_cb_register(cn10k_eth_sec_sso_work_cb, NULL); - ipsec = &conf->ipsec; crypto = conf->crypto_xform; inbound = !!(ipsec->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS); -- 2.8.4