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From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: <jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
	"Kiran Kumar K" <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>
Cc: <dev@dpdk.org>
Subject: [PATCH v2 03/21] common/cnxk: adjust shaper rates to lower boundaries
Date: Wed, 23 Feb 2022 01:04:54 +0530	[thread overview]
Message-ID: <20220222193512.19292-3-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20220222193512.19292-1-ndabilpuram@marvell.com>

From: Satha Rao <skoteshwar@marvell.com>

Provide a method to get floor values for a requested shaper rate,
which can assure packets should never be transmitted at a rate higher
than configured.

Keep the old API to get HW suggested values.
And introduce new parameter to select appropriate API.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---
 drivers/common/cnxk/roc_nix.h          |  1 +
 drivers/common/cnxk/roc_nix_priv.h     |  4 +-
 drivers/common/cnxk/roc_nix_tm_ops.c   | 10 ++--
 drivers/common/cnxk/roc_nix_tm_utils.c | 90 ++++++++++++++++++++++++++++++++--
 4 files changed, 96 insertions(+), 9 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 755212c..250e1c0 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -531,6 +531,7 @@ struct roc_nix_tm_shaper_profile {
 	uint64_t peak_sz;
 	int32_t pkt_len_adj;
 	bool pkt_mode;
+	int8_t accuracy;
 	/* Function to free this memory */
 	void (*free_fn)(void *profile);
 };
diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 4d2a7d8..ec6f106 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -95,6 +95,7 @@ struct nix_tm_shaper_profile {
 	int32_t pkt_mode_adj;
 	bool pkt_mode;
 	uint32_t id;
+	int8_t accuracy;
 	void (*free_fn)(void *profile);
 
 	uint32_t ref_cnt;
@@ -399,7 +400,8 @@ uint32_t nix_tm_check_rr(struct nix *nix, uint32_t parent_id,
 			 uint32_t *max_prio);
 uint64_t nix_tm_shaper_profile_rate_min(struct nix *nix);
 uint64_t nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,
-				 uint64_t *mantissa_p, uint64_t *div_exp_p);
+				 uint64_t *mantissa_p, uint64_t *div_exp_p,
+				 int8_t accuracy);
 uint64_t nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,
 				  uint64_t *mantissa_p);
 bool nix_tm_child_res_valid(struct nix_tm_node_list *list,
diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c
index 3d81247..a1f5f0e 100644
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -173,8 +173,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
 	if (commit_rate || commit_sz) {
 		if (commit_sz < min_burst || commit_sz > max_burst)
 			return NIX_ERR_TM_INVALID_COMMIT_SZ;
-		else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL,
-						  NULL))
+		else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL, NULL,
+						  profile->accuracy))
 			return NIX_ERR_TM_INVALID_COMMIT_RATE;
 	}
 
@@ -182,7 +182,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
 	if (peak_sz || peak_rate) {
 		if (peak_sz < min_burst || peak_sz > max_burst)
 			return NIX_ERR_TM_INVALID_PEAK_SZ;
-		else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL))
+		else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL,
+						  profile->accuracy))
 			return NIX_ERR_TM_INVALID_PEAK_RATE;
 	}
 
@@ -230,6 +231,7 @@ roc_nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
 	profile->pkt_len_adj = roc_profile->pkt_len_adj;
 	profile->pkt_mode = roc_profile->pkt_mode;
 	profile->free_fn = roc_profile->free_fn;
+	profile->accuracy = roc_profile->accuracy;
 
 	return nix_tm_shaper_profile_add(roc_nix, profile, 0);
 }
@@ -246,6 +248,8 @@ roc_nix_tm_shaper_profile_update(struct roc_nix *roc_nix,
 	profile->peak.rate = roc_profile->peak_rate;
 	profile->commit.size = roc_profile->commit_sz;
 	profile->peak.size = roc_profile->peak_sz;
+	profile->pkt_len_adj = roc_profile->pkt_len_adj;
+	profile->accuracy = roc_profile->accuracy;
 
 	return nix_tm_shaper_profile_add(roc_nix, profile, 1);
 }
diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
index 9e80c2a..bcdf990 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -125,9 +125,72 @@ nix_tm_node_search(struct nix *nix, uint32_t node_id, enum roc_nix_tm_tree tree)
 	return NULL;
 }
 
-uint64_t
-nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,
-			uint64_t *mantissa_p, uint64_t *div_exp_p)
+static uint64_t
+nix_tm_shaper_rate_conv_floor(uint64_t value, uint64_t *exponent_p,
+			      uint64_t *mantissa_p, uint64_t *div_exp_p)
+{
+	uint64_t div_exp, exponent, mantissa;
+
+	/* Boundary checks */
+	if (value < NIX_TM_MIN_SHAPER_RATE || value > NIX_TM_MAX_SHAPER_RATE)
+		return 0;
+
+	if (value <= NIX_TM_SHAPER_RATE(0, 0, 0)) {
+		/* Calculate rate div_exp and mantissa using
+		 * the following formula:
+		 *
+		 * value = (2E6 * (256 + mantissa)
+		 *              / ((1 << div_exp) * 256))
+		 */
+		div_exp = 0;
+		exponent = 0;
+		mantissa = NIX_TM_MAX_RATE_MANTISSA;
+
+		while (value <= (NIX_TM_SHAPER_RATE_CONST / (1 << div_exp)))
+			div_exp += 1;
+
+		while (value <= ((NIX_TM_SHAPER_RATE_CONST * (256 + mantissa)) /
+				 ((1 << div_exp) * 256)))
+			mantissa -= 1;
+	} else {
+		/* Calculate rate exponent and mantissa using
+		 * the following formula:
+		 *
+		 * value = (2E6 * ((256 + mantissa) << exponent)) / 256
+		 *
+		 */
+		div_exp = 0;
+		exponent = NIX_TM_MAX_RATE_EXPONENT;
+		mantissa = NIX_TM_MAX_RATE_MANTISSA;
+
+		while (value <= (NIX_TM_SHAPER_RATE_CONST * (1 << exponent)))
+			exponent -= 1;
+
+		while (value <= ((NIX_TM_SHAPER_RATE_CONST *
+				  ((256 + mantissa) << exponent)) /
+				 256))
+			mantissa -= 1;
+	}
+
+	if (div_exp > NIX_TM_MAX_RATE_DIV_EXP ||
+	    exponent > NIX_TM_MAX_RATE_EXPONENT ||
+	    mantissa > NIX_TM_MAX_RATE_MANTISSA)
+		return 0;
+
+	if (div_exp_p)
+		*div_exp_p = div_exp;
+	if (exponent_p)
+		*exponent_p = exponent;
+	if (mantissa_p)
+		*mantissa_p = mantissa;
+
+	/* Calculate real rate value */
+	return NIX_TM_SHAPER_RATE(exponent, mantissa, div_exp);
+}
+
+static uint64_t
+nix_tm_shaper_rate_conv_exact(uint64_t value, uint64_t *exponent_p,
+			      uint64_t *mantissa_p, uint64_t *div_exp_p)
 {
 	uint64_t div_exp, exponent, mantissa;
 
@@ -188,6 +251,23 @@ nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,
 	return NIX_TM_SHAPER_RATE(exponent, mantissa, div_exp);
 }
 
+/* With zero accuracy we will tune parameters as defined by HW,
+ * non zero accuracy will keep the parameters close to lower values
+ * and make sure long-term shaper rate will not exceed the requested rate.
+ */
+uint64_t
+nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,
+			uint64_t *mantissa_p, uint64_t *div_exp_p,
+			int8_t accuracy)
+{
+	if (!accuracy)
+		return nix_tm_shaper_rate_conv_exact(value, exponent_p,
+						     mantissa_p, div_exp_p);
+
+	return nix_tm_shaper_rate_conv_floor(value, exponent_p, mantissa_p,
+					     div_exp_p);
+}
+
 uint64_t
 nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,
 			 uint64_t *mantissa_p)
@@ -245,13 +325,13 @@ nix_tm_shaper_conf_get(struct nix_tm_shaper_profile *profile,
 	if (profile->commit.rate)
 		cir->rate = nix_tm_shaper_rate_conv(
 			profile->commit.rate, &cir->exponent, &cir->mantissa,
-			&cir->div_exp);
+			&cir->div_exp, profile->accuracy);
 
 	/* Calculate PIR exponent and mantissa */
 	if (profile->peak.rate)
 		pir->rate = nix_tm_shaper_rate_conv(
 			profile->peak.rate, &pir->exponent, &pir->mantissa,
-			&pir->div_exp);
+			&pir->div_exp, profile->accuracy);
 
 	/* Calculate CIR burst exponent and mantissa */
 	if (profile->commit.size)
-- 
2.8.4


  parent reply	other threads:[~2022-02-22 19:35 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-07  7:29 [PATCH 01/20] common/cnxk: increase resource count for bitmap alloc Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 02/20] common/cnxk: realloc inline device XAQ AURA Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 03/20] common/cnxk: adjust shaper rates to lower boundaries Nithin Dabilpuram
2022-02-17 13:20   ` Jerin Jacob
2022-02-22 18:19     ` Nithin Kumar Dabilpuram
2022-02-22 18:21       ` Jerin Jacob
2022-02-07  7:29 ` [PATCH 04/20] common/cnxk: support inline device API without ROC NIX Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 05/20] common/cnxk: use common SA init API for default options Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 06/20] common/cnxk: enable l3hdr write back in SA Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 07/20] common/cnxk: support to enable aura tail drop for RQ Nithin Dabilpuram
2022-02-17 13:24   ` Jerin Jacob
2022-02-07  7:29 ` [PATCH 08/20] common/cnxk: use SSO time counter threshold for IRQ Nithin Dabilpuram
2022-02-17 13:25   ` Jerin Jacob
2022-02-07  7:29 ` [PATCH 09/20] common/cnxk: allow force use of SSO pffunc for outb inline Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 10/20] net/cnxk: added Rx metadata negotiate operation Nithin Dabilpuram
2022-02-17 13:33   ` Jerin Jacob
2022-02-22 18:31     ` Nithin Kumar Dabilpuram
2022-02-07  7:29 ` [PATCH 11/20] common/cnxk: removed tracking of mark actions Nithin Dabilpuram
2022-02-17 13:36   ` Jerin Jacob
2022-02-07  7:29 ` [PATCH 12/20] net/cnxk: fix inline device RQ tag mask Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 13/20] net/cnxk: register callback early to handle initial packets Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 14/20] net/cnxk: realloc inline dev XAQ for security Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 15/20] net/cnxk: use raw mbuf free on inline sec err Nithin Dabilpuram
2022-02-17 13:45   ` Jerin Jacob
2022-02-07  7:29 ` [PATCH 16/20] net/cnxk: use NPA batch burst free for meta buffers Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 17/20] net/cnxk: enable packet pool tail drop Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 18/20] net/cnxk: enable flow control by default on device configure Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 19/20] net/cnxk: add dev args for min-max spi Nithin Dabilpuram
2022-02-07  7:29 ` [PATCH 20/20] net/cnxk: add option to override outbound inline sa iv Nithin Dabilpuram
2022-02-17 13:54   ` Jerin Jacob
2022-02-17 13:11 ` [PATCH 01/20] common/cnxk: increase resource count for bitmap alloc Jerin Jacob
2022-02-17 13:13 ` Jerin Jacob
2022-02-22 19:34 ` [PATCH v2 01/21] common/cnxk: increase SMQ resource count Nithin Dabilpuram
2022-02-22 19:34   ` [PATCH v2 02/21] common/cnxk: realloc inline device XAQ AURA Nithin Dabilpuram
2022-02-22 19:34   ` Nithin Dabilpuram [this message]
2022-02-22 19:34   ` [PATCH v2 04/21] common/cnxk: support inline device API without ROC NIX Nithin Dabilpuram
2022-02-22 19:34   ` [PATCH v2 05/21] common/cnxk: use common SA init API for default options Nithin Dabilpuram
2022-02-22 19:34   ` [PATCH v2 06/21] common/cnxk: enable l3hdr write back in SA Nithin Dabilpuram
2022-02-22 19:34   ` [PATCH v2 07/21] common/cnxk: support to enable AURA tail drop for RQ Nithin Dabilpuram
2022-02-22 19:34   ` [PATCH v2 08/21] common/cnxk: use SSO time counter threshold for IRQ Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 09/21] common/cnxk: allow force use of SSO pffunc for outb inline Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 10/21] net/cnxk: added Rx metadata negotiate operation Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 11/21] common/cnxk: remove tracking of mark actions Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 12/21] net/cnxk: fix inline device RQ tag mask Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 13/21] net/cnxk: register callback early to handle initial packets Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 14/21] net/cnxk: realloc inline dev XAQ for security Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 15/21] net/cnxk: fix inline IPsec security error handling Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 16/21] net/cnxk: use NPA batch burst free for meta buffers Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 17/21] net/cnxk: enable packet pool tail drop Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 18/21] net/cnxk: enable flow control by default on device configure Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 19/21] net/cnxk: add dev args for min-max spi Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 20/21] net/cnxk: add option to override outbound inline SA IV Nithin Dabilpuram
2022-02-22 19:35   ` [PATCH v2 21/21] doc: add table for environment variables used by cnxk Nithin Dabilpuram
2022-02-26  9:22     ` Thomas Monjalon
2022-02-26  9:37       ` Jerin Jacob
2022-02-26 13:31         ` Thomas Monjalon
2022-02-23 16:45   ` [PATCH v2 01/21] common/cnxk: increase SMQ resource count Jerin Jacob

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