From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5A129A034E; Thu, 24 Feb 2022 14:42:27 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8A66842727; Thu, 24 Feb 2022 14:41:48 +0100 (CET) Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-sn1anam02on2048.outbound.protection.outlook.com [40.107.96.48]) by mails.dpdk.org (Postfix) with ESMTP id 8C3FD42704 for ; Thu, 24 Feb 2022 14:41:37 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=dTTAZJW2OD4DK6VOjwMTmW2LeHvL7rciqK5RqKd9kE6gs9R6g4Ene8uUWK6llL5q3bt7OqQLh+oPwLXwBuF7C0Ktel3GgPGiNWPYH0uqx8GdYv12mLaEQbKB9LzBTr2prEBOf0GlINY/C9x77v4nwF9z36G/mEmSq6BSa42NZpz0ZIw/toBEV11Y/XctwkdvZqm2ffY/L5qNRbhbtAMaea8b0/C2/kBkIFoCVvqKyyQ2cuPQ+LV4FV5s6VNYrQzSwQgfoYQxvrWlAiBILgSItG92RcDrDoIvYUZ5DRhqAHC4cjI7R1Xs9a/pjrVABmStDKMAzy29IYPIJmoOC0TQmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6KCSS7jjIJXnDdwSzJBaPQ9MvlFUq+ZG6XYnxsoZcLs=; b=nhVJZzPa7gHBFlIp2gFvOysAlLjYnRDF+PsGOgelXtIu/I0OTFN8hUgZIRON55R13XLNmGRWEw9sSis5iBdwMJwre9jLBWyIjrgBGkEP77QE9H5QmHZgugrKMp6NdTyyXGYqiCXcSSt49/OPG/ouhLJJsyTWxLZgQME6KjHxe/9A+PqJ8sWYr9iS6xhGDVRWlKYpD4yhhdcTgPP/EOhwX7G9kZJjETT35Mn7PAK6NfV/W07tvamMKe93HOBL/f6JI/ViaPTseCreO/Xs8+mUY85G9ZbdmgEYroyCx/IniZ5D8SL4SJnS7WJxbD6p3/+H3UwyA0iC8ciydVYSI2zNQg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.234) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6KCSS7jjIJXnDdwSzJBaPQ9MvlFUq+ZG6XYnxsoZcLs=; b=eX10GilMZNnvXC059Hq/8pTGeqE/81p9i2Edw37pTmbcOWmyehA97YD3joK74vAAN7idwAW1u37nqjpamwes70AnzfA4vFe5/HjhK6EUFPP0/rzgBGMDVKn65TtsgluepgPBKEKOadnFUU2fwU9uwB8YLL98D0kHv2gcnBGIAenv+9Fz12zxK4RdAAuJ51nn/gsUgO7AawARvGl+CfIDMJYQ1aszwvQjHe486X8TaHcuL85ExcQgv+JJdvZVPvWFYl0btuJnfXIa1pMSq+TmnFl9Ii3em7FU4S6mukYCvDfVLeAoqmy8SCx3CAUZ/NdaweoBGhWxAMZvM1sgISfffA== Received: from DS7PR06CA0039.namprd06.prod.outlook.com (2603:10b6:8:54::7) by BN7PR12MB2705.namprd12.prod.outlook.com (2603:10b6:408:25::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5017.21; Thu, 24 Feb 2022 13:41:35 +0000 Received: from DM6NAM11FT017.eop-nam11.prod.protection.outlook.com (2603:10b6:8:54:cafe::5c) by DS7PR06CA0039.outlook.office365.com (2603:10b6:8:54::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5017.22 via Frontend Transport; Thu, 24 Feb 2022 13:41:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.234) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.234 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.234; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.234) by DM6NAM11FT017.mail.protection.outlook.com (10.13.172.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5017.22 via Frontend Transport; Thu, 24 Feb 2022 13:41:35 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL101.nvidia.com (10.27.9.10) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 24 Feb 2022 13:41:34 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Thu, 24 Feb 2022 05:41:32 -0800 From: Suanming Mou To: , CC: , , Subject: [PATCH v4 12/14] net/mlx5: add mark action Date: Thu, 24 Feb 2022 15:40:49 +0200 Message-ID: <20220224134051.18167-13-suanmingm@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20220224134051.18167-1-suanmingm@nvidia.com> References: <20220210162926.20436-1-suanmingm@nvidia.com> <20220224134051.18167-1-suanmingm@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a72cd3d1-3139-47c0-d9cb-08d9f79b600a X-MS-TrafficTypeDiagnostic: BN7PR12MB2705:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IgNlUOrlS0o9QwpvACAGTSleunveHx0F77QQvUCgQMucPMxs8gPIPPhdeU6swiUAq4o74v8p+BHA4oBhlQ/8M3FSrLytpBo77ROrl2DsrN9xTj8q8fs0VAXnOJsST7padeM0Qspd09uSuJZppV2XcY6amzXv++E1oaiCNtVyhdy13AswCD1Ns1Zt6wrsxGW3dJrl1wWC/G2XyWERa4Jqw1RF6hyYDzOeAvYMFCF+SGKNNeB1ZJ9Xj3KSsPdz+cJWCTvX9DpYKh1tQuHPaBttybZSZUi9bipBvxlWDEwmKXvaQ51asz5X2e0HT2X4y9MDGVC2OfionAWHu2dnyon3I8ZQ730HyGt1q1Cp7pJQr7tP1lGSewYlcaS90WiKQ1PWbeQNEEXsvewnwhCeBJlfushwAScTfTUyDMe+QeKXeg6PcPKxt4a376xZPiug63BOG/ExGTy61qSFBlhDBR02xI0oKoFmcHzN+Lf15xaHSLVRVzKU8Ujm5S/qS9hwnmFiSEE72Poc4hAFUcSE7DupNj4GEOHEJfAMFXJ0WAJcJG99lAo253FWVga2nciQ4IqQCi6DFVRktw1lOAVWkFTc+5AOqUbopTV3ZbtNi2DuXU1wk3ObNLNZaRVMuRyPw7Q1rcPy26Vsf+ozBuup43G/yetL94QrFI1d7XT+Sfg1v7pz4yefIUDUbcP+bnp4o7KwoyOFG7tUC2T/bX4PpnUszA== X-Forefront-Antispam-Report: CIP:12.22.5.234; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(508600001)(82310400004)(83380400001)(6666004)(7696005)(4326008)(70586007)(70206006)(47076005)(2906002)(40460700003)(2616005)(1076003)(6286002)(426003)(36756003)(55016003)(16526019)(26005)(336012)(186003)(356005)(81166007)(86362001)(36860700001)(8936002)(5660300002)(8676002)(6636002)(110136005)(316002)(54906003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2022 13:41:35.1701 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a72cd3d1-3139-47c0-d9cb-08d9f79b600a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR12MB2705 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The mark action is covered by tag action internally. While it is added the HW will add a tag to the packet. The mark value can be set as fixed or dynamic as the action mask indicates. Signed-off-by: Suanming Mou Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5.h | 2 + drivers/net/mlx5/mlx5_flow.h | 1 + drivers/net/mlx5/mlx5_flow_hw.c | 66 ++++++++++++++++++++++++++++++--- 3 files changed, 63 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index fe422f7fd1..df0257ff23 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1532,6 +1532,8 @@ struct mlx5_priv { /* HW steering global drop action. */ struct mlx5dr_action *hw_drop[MLX5_HW_ACTION_FLAG_MAX] [MLX5DR_TABLE_TYPE_MAX]; + /* HW steering global drop action. */ + struct mlx5dr_action *hw_tag[MLX5_HW_ACTION_FLAG_MAX]; struct mlx5_indexed_pool *acts_ipool; /* Action data indexed pool. */ #endif }; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 70e6cf633f..c83e73c793 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1077,6 +1077,7 @@ struct mlx5_hw_actions { struct mlx5_hw_jump_action *jump; /* Jump action. */ struct mlx5_hrxq *tir; /* TIR action. */ uint32_t acts_num:4; /* Total action number. */ + uint32_t mark:1; /* Indicate the mark action. */ /* Translated DR action array from action template. */ struct mlx5dr_rule_action rule_acts[MLX5_HW_MAX_ACTS]; }; diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 81542e0fc5..c3423597bd 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -37,6 +37,31 @@ static uint32_t mlx5_hw_act_flag[MLX5_HW_ACTION_FLAG_MAX] }, }; +/** + * Set rxq flag. + * + * @param[in] dev + * Pointer to the rte_eth_dev structure. + * @param[in] enable + * Flag to enable or not. + */ +static void +flow_hw_rxq_flag_set(struct rte_eth_dev *dev, bool enable) +{ + struct mlx5_priv *priv = dev->data->dev_private; + unsigned int i; + + if ((!priv->mark_enabled && !enable) || + (priv->mark_enabled && enable)) + return; + for (i = 0; i < priv->rxqs_n; ++i) { + struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i); + + rxq_ctrl->rxq.mark = enable; + } + priv->mark_enabled = enable; +} + /** * Register destination table DR jump action. * @@ -298,6 +323,20 @@ flow_hw_actions_translate(struct rte_eth_dev *dev, acts->rule_acts[i++].action = priv->hw_drop[!!attr->group][type]; break; + case RTE_FLOW_ACTION_TYPE_MARK: + acts->mark = true; + if (masks->conf) + acts->rule_acts[i].tag.value = + mlx5_flow_mark_set + (((const struct rte_flow_action_mark *) + (masks->conf))->id); + else if (__flow_hw_act_data_general_append(priv, acts, + actions->type, actions - action_start, i)) + goto err; + acts->rule_acts[i++].action = + priv->hw_tag[!!attr->group]; + flow_hw_rxq_flag_set(dev, true); + break; case RTE_FLOW_ACTION_TYPE_JUMP: if (masks->conf) { uint32_t jump_group = @@ -424,6 +463,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev, } LIST_FOREACH(act_data, &hw_acts->act_list, next) { uint32_t jump_group; + uint32_t tag; struct mlx5_hw_jump_action *jump; struct mlx5_hrxq *hrxq; @@ -435,6 +475,12 @@ flow_hw_actions_construct(struct rte_eth_dev *dev, break; case RTE_FLOW_ACTION_TYPE_VOID: break; + case RTE_FLOW_ACTION_TYPE_MARK: + tag = mlx5_flow_mark_set + (((const struct rte_flow_action_mark *) + (action->conf))->id); + rule_acts[act_data->action_dst].tag.value = tag; + break; case RTE_FLOW_ACTION_TYPE_JUMP: jump_group = ((const struct rte_flow_action_jump *) action->conf)->group; @@ -1029,6 +1075,8 @@ flow_hw_table_destroy(struct rte_eth_dev *dev, __atomic_sub_fetch(&table->its[i]->refcnt, 1, __ATOMIC_RELAXED); for (i = 0; i < table->nb_action_templates; i++) { + if (table->ats[i].acts.mark) + flow_hw_rxq_flag_set(dev, false); __flow_hw_action_template_destroy(dev, &table->ats[i].acts); __atomic_sub_fetch(&table->ats[i].action_template->refcnt, 1, __ATOMIC_RELAXED); @@ -1563,15 +1611,20 @@ flow_hw_configure(struct rte_eth_dev *dev, if (!priv->hw_drop[i][j]) goto err; } + priv->hw_tag[i] = mlx5dr_action_create_tag + (priv->dr_ctx, mlx5_hw_act_flag[i][0]); + if (!priv->hw_tag[i]) + goto err; } return 0; err: for (i = 0; i < MLX5_HW_ACTION_FLAG_MAX; i++) { for (j = 0; j < MLX5DR_TABLE_TYPE_MAX; j++) { - if (!priv->hw_drop[i][j]) - continue; - mlx5dr_action_destroy(priv->hw_drop[i][j]); + if (priv->hw_drop[i][j]) + mlx5dr_action_destroy(priv->hw_drop[i][j]); } + if (priv->hw_tag[i]) + mlx5dr_action_destroy(priv->hw_tag[i]); } if (dr_ctx) claim_zero(mlx5dr_context_close(dr_ctx)); @@ -1617,10 +1670,11 @@ flow_hw_resource_release(struct rte_eth_dev *dev) } for (i = 0; i < MLX5_HW_ACTION_FLAG_MAX; i++) { for (j = 0; j < MLX5DR_TABLE_TYPE_MAX; j++) { - if (!priv->hw_drop[i][j]) - continue; - mlx5dr_action_destroy(priv->hw_drop[i][j]); + if (priv->hw_drop[i][j]) + mlx5dr_action_destroy(priv->hw_drop[i][j]); } + if (priv->hw_tag[i]) + mlx5dr_action_destroy(priv->hw_tag[i]); } if (priv->acts_ipool) { mlx5_ipool_destroy(priv->acts_ipool); -- 2.25.1