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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.236) by DM6NAM11FT056.mail.protection.outlook.com (10.13.173.99) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5038.14 via Frontend Transport; Tue, 8 Mar 2022 16:37:08 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 8 Mar 2022 16:36:59 +0000 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Tue, 8 Mar 2022 08:36:59 -0800 From: To: CC: Elena Agostini Subject: [PATCH v2 1/2] gpudev: add GPU page_size to info Date: Tue, 8 Mar 2022 23:59:47 +0000 Message-ID: <20220308235948.16645-1-eagostini@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220301190555.20012-1-eagostini@nvidia.com> References: <20220301190555.20012-1-eagostini@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0f511b8e-f741-4a77-9f31-08da0121e373 X-MS-TrafficTypeDiagnostic: CY4PR12MB1623:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Mar 2022 16:37:08.6650 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0f511b8e-f741-4a77-9f31-08da0121e373 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1623 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Elena Agostini Page alignment on the GPU can be different from the CPU page alignment. Fixes: 9b8cae4d991e ("gpudev: use CPU mapping in communication list") Signed-off-by: Elena Agostini --- drivers/gpu/cuda/cuda.c | 4 ++++ lib/gpudev/rte_gpudev.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/cuda/cuda.c b/drivers/gpu/cuda/cuda.c index cf9e59535c..8505d39d64 100644 --- a/drivers/gpu/cuda/cuda.c +++ b/drivers/gpu/cuda/cuda.c @@ -523,6 +523,8 @@ cuda_dev_info_get(struct rte_gpu *dev, struct rte_gpu_info *info) } dev->mpshared->info.total_memory = parent_info.total_memory; + dev->mpshared->info.page_size = parent_info.page_size; + /* * GPU Device private info */ @@ -1173,6 +1175,8 @@ cuda_gpu_probe(__rte_unused struct rte_pci_driver *pci_drv, struct rte_pci_devic return -rte_errno; } + dev->mpshared->info.page_size = (size_t)GPU_PAGE_SIZE; + /* * GPU Device private info */ diff --git a/lib/gpudev/rte_gpudev.h b/lib/gpudev/rte_gpudev.h index 7e2401a4b7..971aeacfff 100644 --- a/lib/gpudev/rte_gpudev.h +++ b/lib/gpudev/rte_gpudev.h @@ -61,6 +61,8 @@ struct rte_gpu_info { size_t total_memory; /* Local NUMA memory ID. -1 if unknown. */ int16_t numa_node; + /* Get GPU memory page size. */ + size_t page_size; }; /** Flags passed in notification callback. */ -- 2.17.1