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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.236) by DM6NAM11FT056.mail.protection.outlook.com (10.13.173.99) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5038.14 via Frontend Transport; Tue, 8 Mar 2022 16:37:10 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 8 Mar 2022 16:37:00 +0000 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Tue, 8 Mar 2022 08:36:59 -0800 From: To: CC: Elena Agostini Subject: [PATCH v2 2/2] gpudev: use page_size in comm_list creation Date: Tue, 8 Mar 2022 23:59:48 +0000 Message-ID: <20220308235948.16645-2-eagostini@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308235948.16645-1-eagostini@nvidia.com> References: <20220301190555.20012-1-eagostini@nvidia.com> <20220308235948.16645-1-eagostini@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7fcdcce6-2463-4311-2c67-08da0121e469 X-MS-TrafficTypeDiagnostic: MN2PR12MB4191:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Mar 2022 16:37:10.2586 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7fcdcce6-2463-4311-2c67-08da0121e469 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4191 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Elena Agostini Memory allocated for CPU mapping the status flag in the communication list should be aligned to the GPU page size. Fixes: 9b8cae4d991e ("gpudev: use CPU mapping in communication list") Signed-off-by: Elena Agostini --- lib/gpudev/gpudev.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/lib/gpudev/gpudev.c b/lib/gpudev/gpudev.c index fb1bee344c..56033f4a5f 100644 --- a/lib/gpudev/gpudev.c +++ b/lib/gpudev/gpudev.c @@ -820,6 +820,7 @@ rte_gpu_comm_create_list(uint16_t dev_id, uint32_t idx_l; int ret; struct rte_gpu *dev; + struct rte_gpu_info info; if (num_comm_items == 0) { rte_errno = EINVAL; @@ -833,6 +834,12 @@ rte_gpu_comm_create_list(uint16_t dev_id, return NULL; } + ret = rte_gpu_info_get(dev_id, &info); + if (ret < 0) { + rte_errno = ENODEV; + return NULL; + } + comm_list = rte_zmalloc(NULL, sizeof(struct rte_gpu_comm_list) * num_comm_items, 0); if (comm_list == NULL) { @@ -855,7 +862,7 @@ rte_gpu_comm_create_list(uint16_t dev_id, */ comm_list[0].status_d = rte_gpu_mem_alloc(dev_id, sizeof(enum rte_gpu_comm_list_status) * num_comm_items, - rte_mem_page_size()); + info.page_size); if (ret < 0) { rte_errno = ENOMEM; return NULL; -- 2.17.1