[PATCH 1/4] net/dpaa2: update mc to 10.32

[PATCH 1/4] net/dpaa2: update mc to 10.32

[Gagandeep Singh]

From: Rohit Raj <rohit.raj@nxp.com>

Updating the management complex to version 10.32

Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
 drivers/bus/fslmc/mc/fsl_dpmng.h    |  4 ++--
 drivers/net/dpaa2/mc/dpni.c         |  6 ++++--
 drivers/net/dpaa2/mc/fsl_dpni.h     |  1 +
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 26 +++++++++++++++-----------
 4 files changed, 22 insertions(+), 15 deletions(-)

diff --git a/drivers/bus/fslmc/mc/fsl_dpmng.h b/drivers/bus/fslmc/mc/fsl_dpmng.h
index 073d47efbf..c6ea220df7 100644
--- a/drivers/bus/fslmc/mc/fsl_dpmng.h
+++ b/drivers/bus/fslmc/mc/fsl_dpmng.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2015 Freescale Semiconductor Inc.
- * Copyright 2017-2021 NXP
+ * Copyright 2017-2022 NXP
  *
  */
 #ifndef __FSL_DPMNG_H
@@ -20,7 +20,7 @@ struct fsl_mc_io;
  * Management Complex firmware version information
  */
 #define MC_VER_MAJOR 10
-#define MC_VER_MINOR 29
+#define MC_VER_MINOR 32
 
 /**
  * struct mc_version
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index c5cc9302f9..4d97b98939 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2022 NXP
  *
  */
 #include <fsl_mc_sys.h>
@@ -596,6 +596,7 @@ int dpni_get_attributes(struct fsl_mc_io *mc_io,
 	attr->num_channels = rsp_params->num_channels;
 	attr->qos_entries = rsp_params->qos_entries;
 	attr->fs_entries = le16_to_cpu(rsp_params->fs_entries);
+	attr->num_opr = le16_to_cpu(rsp_params->num_opr);
 	attr->qos_key_size = rsp_params->qos_key_size;
 	attr->fs_key_size = rsp_params->fs_key_size;
 	attr->wriop_version = le16_to_cpu(rsp_params->wriop_version);
@@ -2238,7 +2239,8 @@ int dpni_get_early_drop(struct fsl_mc_io *mc_io,
  * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
  * @token:	Token of DPNI object
  * @qtype:	Type of queue - Rx, Tx and Tx confirm types are supported
- * @tc_id:	Traffic class selection (0-7)
+ * @param:	Traffic class and channel. Bits[0-7] contain traaffic class,
+ *		bite[8-15] contains channel id
  * @cfg:	congestion notification configuration
  *
  * Return:	'0' on Success; error code otherwise.
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index e970e4702a..ce84f4265e 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -372,6 +372,7 @@ struct dpni_attr {
 	uint8_t  vlan_filter_entries;
 	uint8_t  qos_entries;
 	uint16_t fs_entries;
+	uint16_t num_opr;
 	uint8_t  qos_key_size;
 	uint8_t  fs_key_size;
 	uint16_t wriop_version;
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index b7bd7556af..781f936add 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2022 NXP
  *
  */
 #ifndef _FSL_DPNI_CMD_H
@@ -9,7 +9,7 @@
 
 /* DPNI Version */
 #define DPNI_VER_MAJOR				8
-#define DPNI_VER_MINOR				0
+#define DPNI_VER_MINOR				2
 
 #define DPNI_CMD_BASE_VERSION			1
 #define DPNI_CMD_VERSION_2			2
@@ -17,6 +17,7 @@
 #define DPNI_CMD_VERSION_4			4
 #define DPNI_CMD_VERSION_5			5
 #define DPNI_CMD_VERSION_6			6
+#define DPNI_CMD_VERSION_7			7
 #define DPNI_CMD_ID_OFFSET			4
 
 #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
@@ -25,17 +26,18 @@
 #define DPNI_CMD_V4(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_4)
 #define DPNI_CMD_V5(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_5)
 #define DPNI_CMD_V6(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_6)
+#define DPNI_CMD_V7(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_7)
 
 /* Command IDs */
 #define DPNI_CMDID_OPEN				DPNI_CMD(0x801)
 #define DPNI_CMDID_CLOSE			DPNI_CMD(0x800)
-#define DPNI_CMDID_CREATE			DPNI_CMD_V6(0x901)
+#define DPNI_CMDID_CREATE			DPNI_CMD_V7(0x901)
 #define DPNI_CMDID_DESTROY			DPNI_CMD(0x981)
 #define DPNI_CMDID_GET_API_VERSION		DPNI_CMD(0xa01)
 
 #define DPNI_CMDID_ENABLE			DPNI_CMD(0x002)
 #define DPNI_CMDID_DISABLE			DPNI_CMD(0x003)
-#define DPNI_CMDID_GET_ATTR			DPNI_CMD_V4(0x004)
+#define DPNI_CMDID_GET_ATTR			DPNI_CMD_V6(0x004)
 #define DPNI_CMDID_RESET			DPNI_CMD(0x005)
 #define DPNI_CMDID_IS_ENABLED			DPNI_CMD(0x006)
 
@@ -104,17 +106,17 @@
 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION	DPNI_CMD_V3(0x268)
 #define DPNI_CMDID_SET_EARLY_DROP		DPNI_CMD_V3(0x269)
 #define DPNI_CMDID_GET_EARLY_DROP		DPNI_CMD_V3(0x26A)
-#define DPNI_CMDID_GET_OFFLOAD			DPNI_CMD(0x26B)
-#define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD(0x26C)
+#define DPNI_CMDID_GET_OFFLOAD			DPNI_CMD_V2(0x26B)
+#define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD_V2(0x26C)
 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD(0x266)
 #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD(0x26D)
-#define DPNI_CMDID_SET_OPR			DPNI_CMD(0x26e)
-#define DPNI_CMDID_GET_OPR			DPNI_CMD(0x26f)
+#define DPNI_CMDID_SET_OPR			DPNI_CMD_V2(0x26e)
+#define DPNI_CMDID_GET_OPR			DPNI_CMD_V2(0x26f)
 #define DPNI_CMDID_LOAD_SW_SEQUENCE		DPNI_CMD(0x270)
 #define DPNI_CMDID_ENABLE_SW_SEQUENCE		DPNI_CMD(0x271)
 #define DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT	DPNI_CMD(0x272)
-#define DPNI_CMDID_SET_RX_FS_DIST		DPNI_CMD(0x273)
-#define DPNI_CMDID_SET_RX_HASH_DIST		DPNI_CMD(0x274)
+#define DPNI_CMDID_SET_RX_FS_DIST		DPNI_CMD_V2(0x273)
+#define DPNI_CMDID_SET_RX_HASH_DIST		DPNI_CMD_V2(0x274)
 #define DPNI_CMDID_ADD_CUSTOM_TPID		DPNI_CMD(0x275)
 #define DPNI_CMDID_REMOVE_CUSTOM_TPID		DPNI_CMD(0x276)
 #define DPNI_CMDID_GET_CUSTOM_TPID		DPNI_CMD(0x277)
@@ -238,7 +240,7 @@ struct dpni_rsp_get_attr {
 	uint8_t qos_entries;
 	uint8_t pad2;
 	uint16_t fs_entries;
-	uint16_t pad3;
+	uint16_t num_opr;
 	/* response word 2 */
 	uint8_t qos_key_size;
 	uint8_t fs_key_size;
@@ -906,6 +908,8 @@ struct dpni_rsp_single_step_cfg {
 	uint16_t	flags;
 	uint16_t	offset;
 	uint32_t	peer_delay;
+	uint32_t	ptp_onestep_reg_base;
+	uint32_t	pad0;
 };
 
 #define DPNI_PORT_LOOPBACK_EN_SHIFT	0
-- 
2.25.1

[PATCH 2/4] net/dpaa2: support mempool debug

[Gagandeep Singh]

This patch supports mempool debug to detect
buffer overflows.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
 drivers/net/dpaa2/dpaa2_rxtx.c | 42 ++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index b8844fbdf1..d536352895 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -312,6 +312,10 @@ eth_sg_fd_to_mbuf(const struct qbman_fd *fd,
 			dpaa2_dev_rx_parse(first_seg, hw_annot_addr);
 
 	rte_mbuf_refcnt_set(first_seg, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+	rte_mempool_check_cookies(rte_mempool_from_obj((void *)first_seg),
+			(void **)&first_seg, 1, 1);
+#endif
 	cur_seg = first_seg;
 	while (!DPAA2_SG_IS_FINAL(sge)) {
 		sge = &sgt[i++];
@@ -324,6 +328,10 @@ eth_sg_fd_to_mbuf(const struct qbman_fd *fd,
 		next_seg->data_len  = sge->length  & 0x1FFFF;
 		first_seg->nb_segs += 1;
 		rte_mbuf_refcnt_set(next_seg, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+		rte_mempool_check_cookies(rte_mempool_from_obj((void *)next_seg),
+				(void **)&next_seg, 1, 1);
+#endif
 		cur_seg->next = next_seg;
 		next_seg->next = NULL;
 		cur_seg = next_seg;
@@ -331,6 +339,10 @@ eth_sg_fd_to_mbuf(const struct qbman_fd *fd,
 	temp = DPAA2_INLINE_MBUF_FROM_BUF(fd_addr,
 		rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
 	rte_mbuf_refcnt_set(temp, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+		rte_mempool_check_cookies(rte_mempool_from_obj((void *)temp),
+				(void **)&temp, 1, 1);
+#endif
 	rte_pktmbuf_free_seg(temp);
 
 	return (void *)first_seg;
@@ -356,6 +368,10 @@ eth_fd_to_mbuf(const struct qbman_fd *fd,
 	mbuf->port = port_id;
 	mbuf->next = NULL;
 	rte_mbuf_refcnt_set(mbuf, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+	rte_mempool_check_cookies(rte_mempool_from_obj((void *)mbuf),
+			(void **)&mbuf, 1, 1);
+#endif
 
 	/* Parse the packet */
 	/* parse results for LX2 are there in FRC field of FD.
@@ -404,6 +420,10 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 			rte_mbuf_refcnt_update(temp, -1);
 		} else {
 			DPAA2_SET_ONLY_FD_BPID(fd, bpid);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+			rte_mempool_check_cookies(rte_mempool_from_obj((void *)temp),
+					(void **)&temp, 1, 0);
+#endif
 		}
 		DPAA2_SET_FD_OFFSET(fd, offset);
 	} else {
@@ -414,6 +434,10 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 		}
 		DPAA2_SET_ONLY_FD_BPID(fd, bpid);
 		DPAA2_SET_FD_OFFSET(fd, temp->data_off);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+		rte_mempool_check_cookies(rte_mempool_from_obj((void *)temp),
+			(void **)&temp, 1, 0);
+#endif
 	}
 	DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(temp));
 	DPAA2_SET_FD_LEN(fd, mbuf->pkt_len);
@@ -450,6 +474,10 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 				} else {
 					DPAA2_SET_FLE_BPID(sge,
 						mempool_to_bpid(cur_seg->pool));
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+				rte_mempool_check_cookies(rte_mempool_from_obj((void *)cur_seg),
+					(void **)&cur_seg, 1, 0);
+#endif
 				}
 			}
 			cur_seg = cur_seg->next;
@@ -500,6 +528,11 @@ eth_mbuf_to_fd(struct rte_mbuf *mbuf,
 			DPAA2_SET_FD_IVP(fd);
 			rte_mbuf_refcnt_update(mbuf, -1);
 		}
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+		else
+			rte_mempool_check_cookies(rte_mempool_from_obj((void *)mbuf),
+				(void **)&mbuf, 1, 0);
+#endif
 	} else if (RTE_MBUF_HAS_EXTBUF(mbuf)) {
 		DPAA2_SET_FD_IVP(fd);
 	} else {
@@ -539,6 +572,10 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
 
 	DPAA2_MBUF_TO_CONTIG_FD(m, fd, bpid);
 
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+	rte_mempool_check_cookies(rte_mempool_from_obj((void *)m),
+		(void **)&m, 1, 0);
+#endif
 	DPAA2_PMD_DP_DEBUG(
 		"mbuf: %p, BMAN buf addr: %p, fdaddr: %" PRIx64 ", bpid: %d,"
 		" meta: %d, off: %d, len: %d\n",
@@ -1260,6 +1297,11 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 					}
 					DPAA2_MBUF_TO_CONTIG_FD((*bufs),
 					&fd_arr[loop], mempool_to_bpid(mp));
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+					rte_mempool_check_cookies
+						(rte_mempool_from_obj((void *)*bufs),
+						(void **)bufs, 1, 0);
+#endif
 					bufs++;
 #ifdef RTE_LIBRTE_IEEE1588
 					enable_tx_tstamp(&fd_arr[loop]);
-- 
2.25.1

[PATCH 3/4] net/dpaa2: support ESP in packet type parsing

[Gagandeep Singh]

This patch supports ESP packet type in packet parsing.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
 drivers/net/dpaa2/dpaa2_rxtx.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index d536352895..5ebce2b4f4 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -179,6 +179,9 @@ dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 		if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_1_OPT_PRESENT |
 			L3_IP_N_OPT_PRESENT))
 			pkt_type |= RTE_PTYPE_L3_IPV4_EXT;
+		if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_IPSEC_ESP_PRESENT |
+					L3_PROTO_ESP_PRESENT))
+			pkt_type |= RTE_PTYPE_TUNNEL_ESP;
 
 	} else if (BIT_ISSET_AT_POS(annotation->word4, L3_IPV6_1_PRESENT |
 		  L3_IPV6_N_PRESENT)) {
@@ -186,6 +189,9 @@ dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 		if (BIT_ISSET_AT_POS(annotation->word4, L3_IP_1_OPT_PRESENT |
 		    L3_IP_N_OPT_PRESENT))
 			pkt_type |= RTE_PTYPE_L3_IPV6_EXT;
+		if (BIT_ISSET_AT_POS(annotation->word4, L3_PROTO_IPSEC_ESP_PRESENT |
+					L3_PROTO_ESP_PRESENT))
+			pkt_type |= RTE_PTYPE_TUNNEL_ESP;
 	} else {
 		goto parse_done;
 	}
-- 
2.25.1

[PATCH 4/4] net/dpaa: fix ethernet event queue de-attach

[Gagandeep Singh]

Calling the correct qman queue free APIs to de-attach the queue.

Fixes: 5e7455931442 ("net/dpaa: support Rx queue configurations with eventdev")
Cc: stable@dpdk.org

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
 drivers/net/dpaa/dpaa_ethdev.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index bddb3bb15c..e5a072cf49 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1211,23 +1211,17 @@ int
 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
 		int eth_rx_queue_id)
 {
-	struct qm_mcc_initfq opts;
+	struct qm_mcc_initfq opts = {0};
 	int ret;
 	u32 flags = 0;
 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
 	struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 
-	dpaa_poll_queue_default_config(&opts);
-
-	if (dpaa_intf->cgr_rx) {
-		opts.we_mask |= QM_INITFQ_WE_CGID;
-		opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
-		opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
-	}
-
+	qman_retire_fq(rxq, NULL);
+	qman_oos_fq(rxq);
 	ret = qman_init_fq(rxq, flags, &opts);
 	if (ret) {
-		DPAA_PMD_ERR("init rx fqid %d failed with ret: %d",
+		DPAA_PMD_ERR("detach rx fqid %d failed with ret: %d",
 			     rxq->fqid, ret);
 	}
 
-- 
2.25.1

Re: [PATCH 1/4] net/dpaa2: update mc to 10.32

[Ferruh Yigit]

On 4/22/2022 5:57 AM, Gagandeep Singh wrote:
> From: Rohit Raj <rohit.raj@nxp.com>
> 
> Updating the management complex to version 10.32
> 
> Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
> Signed-off-by: Gagandeep Singh <g.singh@nxp.com>

Hi Hemant, Sachin,

The set looks good to me, do you have any comment/review?

RE: [PATCH 1/4] net/dpaa2: update mc to 10.32

[Hemant Agrawal]

Hi Ferruh,
	I am ok for it. 
You can add:
Acked-by:  Hemant Agrawal <hemant.agrawal@nxp.com>

> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@xilinx.com>
> Sent: Tuesday, May 10, 2022 6:22 PM
> To: Gagandeep Singh <G.Singh@nxp.com>; dev@dpdk.org; Hemant Agrawal
> <hemant.agrawal@nxp.com>; Sachin Saxena (OSS)
> <sachin.saxena@oss.nxp.com>
> Cc: Rohit Raj <rohit.raj@nxp.com>
> Subject: Re: [PATCH 1/4] net/dpaa2: update mc to 10.32
> Importance: High
> 
> On 4/22/2022 5:57 AM, Gagandeep Singh wrote:
> > From: Rohit Raj <rohit.raj@nxp.com>
> >
> > Updating the management complex to version 10.32
> >
> > Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
> > Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
> 
> Hi Hemant, Sachin,
> 
> The set looks good to me, do you have any comment/review?

Re: [PATCH 1/4] net/dpaa2: update mc to 10.32

[Ferruh Yigit]

On 4/22/2022 5:57 AM, Gagandeep Singh wrote:
> From: Rohit Raj <rohit.raj@nxp.com>
> 
> Updating the management complex to version 10.32
> 
> Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
> Signed-off-by: Gagandeep Singh <g.singh@nxp.com>

For series,
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Series applied to dpdk-next-net/main, thanks.