From: Stanislaw Kardach <kda@semihalf.com>
To: dev@dpdk.org
Cc: Stanislaw Kardach <kda@semihalf.com>,
Frank Zhao <Frank.Zhao@starfivetech.com>,
Sam Grove <sam.grove@sifive.com>,
mw@semihalf.com, upstream@semihalf.com, pbhagavatula@marvell.com
Subject: [PATCH 02/11] examples/l3fwd: fix scalar LPM compilation
Date: Thu, 5 May 2022 19:29:54 +0200 [thread overview]
Message-ID: <20220505173003.3242618-3-kda@semihalf.com> (raw)
In-Reply-To: <20220505173003.3242618-1-kda@semihalf.com>
The lpm_process_event_pkt() can either process a packet using an
architecture specific (defined for X86/SSE, ARM/Neon and PPC64/Altivec)
path or a scalar one. The choice is however done using an ifdef
pre-processor macro. Because of that the scalar version was apparently
not widely excersized/compiled.
Due to some copy/paste errors, the scalar logic in
lpm_process_event_pkt() retained a "continue" statement where a BAD_PORT
should be returned after refactoring of the LPM logic in the l3fwd
example.
Fixes: 99fc91d18082 ("examples/l3fwd: add event lpm main loop")
Cc: pbhagavatula@marvell.com
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Sponsored-by: Frank Zhao <Frank.Zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
---
examples/l3fwd/l3fwd_lpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c
index bec22c44cd..6e1defbf7f 100644
--- a/examples/l3fwd/l3fwd_lpm.c
+++ b/examples/l3fwd/l3fwd_lpm.c
@@ -248,7 +248,7 @@ lpm_process_event_pkt(const struct lcore_conf *lconf, struct rte_mbuf *mbuf)
if (is_valid_ipv4_pkt(ipv4_hdr, mbuf->pkt_len)
< 0) {
mbuf->port = BAD_PORT;
- continue;
+ return mbuf->port;
}
/* Update time to live and header checksum */
--(ipv4_hdr->time_to_live);
--
2.30.2
next prev parent reply other threads:[~2022-05-05 17:30 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-05 17:29 [PATCH 00/11] Introduce support for RISC-V architecture Stanislaw Kardach
2022-05-05 17:29 ` [PATCH 01/11] lpm: add a scalar version of lookupx4 function Stanislaw Kardach
2022-05-05 17:29 ` Stanislaw Kardach [this message]
2022-05-05 17:39 ` [PATCH 02/11] examples/l3fwd: fix scalar LPM compilation Stephen Hemminger
2022-05-05 17:49 ` Stanisław Kardach
2022-05-05 18:09 ` Stephen Hemminger
2022-05-05 17:29 ` [PATCH 03/11] eal: add initial support for RISC-V architecture Stanislaw Kardach
2022-05-05 17:29 ` [PATCH 04/11] net/ixgbe: enable vector stubs for RISC-V Stanislaw Kardach
2022-05-05 17:29 ` [PATCH 05/11] net/memif: set memfd syscall ID on RISC-V Stanislaw Kardach
2022-05-05 17:29 ` [PATCH 06/11] net/tap: set BPF syscall ID for RISC-V Stanislaw Kardach
2022-05-05 17:29 ` [PATCH 07/11] examples/l3fwd: enable RISC-V operation Stanislaw Kardach
2022-05-05 17:30 ` [PATCH 08/11] test/cpuflags: add test for RISC-V cpu flag Stanislaw Kardach
2022-05-05 17:30 ` [PATCH 09/11] test/ring: disable problematic tests for RISC-V Stanislaw Kardach
2022-05-05 17:35 ` Stephen Hemminger
2022-05-05 17:43 ` Stanisław Kardach
2022-05-05 18:06 ` Stephen Hemminger
2022-05-10 23:28 ` Honnappa Nagarahalli
2022-05-11 10:07 ` Stanisław Kardach
2022-05-05 17:30 ` [PATCH 10/11] devtools: add RISC-V to test-meson-builds.sh Stanislaw Kardach
2022-05-05 17:30 ` [PATCH 11/11] test/hash: report non HTM numbers for single r/w Stanislaw Kardach
2022-05-06 9:13 ` [PATCH 00/11] Introduce support for RISC-V architecture David Marchand
2022-05-09 12:24 ` Stanisław Kardach
2022-05-09 12:30 ` Thomas Monjalon
2022-05-11 8:09 ` Morten Brørup
2022-05-11 10:28 ` Stanisław Kardach
2022-05-11 11:06 ` Thomas Monjalon
2022-05-09 14:30 ` David Marchand
2022-05-10 11:21 ` Stanisław Kardach
2022-05-10 12:31 ` Thomas Monjalon
2022-05-10 14:00 ` Stanisław Kardach
2022-05-10 14:23 ` Thomas Monjalon
2022-05-10 15:07 ` [PATCH v2 0/8] " Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 1/8] eal: add initial " Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 2/8] net/ixgbe: enable vector stubs for RISC-V Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 3/8] net/memif: set memfd syscall ID on RISC-V Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 4/8] net/tap: set BPF syscall ID for RISC-V Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 5/8] examples/l3fwd: enable RISC-V operation Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 6/8] test/cpuflags: add test for RISC-V cpu flag Stanislaw Kardach
2022-05-10 15:07 ` [PATCH v2 7/8] devtools: add RISC-V to test-meson-builds.sh Stanislaw Kardach
2022-05-10 15:35 ` Stanisław Kardach
2022-05-10 15:07 ` [PATCH v2 8/8] ci: add RISCV64 cross compilation job Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 0/8] Introduce support for RISC-V architecture Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 1/8] eal: add initial " Stanislaw Kardach
2022-05-13 6:50 ` Heinrich Schuchardt
2022-05-13 8:42 ` Stanisław Kardach
2022-05-13 10:51 ` Heinrich Schuchardt
2022-05-13 11:47 ` Stanisław Kardach
2022-05-13 15:37 ` Stephen Hemminger
2022-05-16 8:00 ` Stanisław Kardach
2022-05-10 15:48 ` [PATCH v3 2/8] net/ixgbe: enable vector stubs for RISC-V Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 3/8] net/memif: set memfd syscall ID on RISC-V Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 4/8] net/tap: set BPF syscall ID for RISC-V Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 5/8] examples/l3fwd: enable RISC-V operation Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 6/8] test/cpuflags: add test for RISC-V cpu flag Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 7/8] devtools: add RISC-V to test-meson-builds.sh Stanislaw Kardach
2022-05-10 15:48 ` [PATCH v3 8/8] ci: add RISCV64 cross compilation job Stanislaw Kardach
2022-05-12 15:47 ` Aaron Conole
2022-05-12 16:07 ` Stanisław Kardach
2022-05-13 14:33 ` Aaron Conole
2022-05-12 8:04 ` [PATCH 00/11] Introduce support for RISC-V architecture Heinrich Schuchardt
2022-05-12 8:35 ` Stanisław Kardach
2022-05-12 9:46 ` Heinrich Schuchardt
2022-05-12 13:56 ` Stanisław Kardach
2022-05-12 21:06 ` Heinrich Schuchardt
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