From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Ruifeng Wang <ruifeng.wang@arm.com>,
Jan Viktorin <viktorin@rehivetech.com>,
Bruce Richardson <bruce.richardson@intel.com>
Cc: <jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>
Subject: [PATCH v4 1/2] config/arm: add SVE ACLE control flag
Date: Mon, 9 May 2022 15:49:31 +0530 [thread overview]
Message-ID: <20220509101932.2403562-1-rbhansali@marvell.com> (raw)
In-Reply-To: <20220505142744.1423344-1-rbhansali@marvell.com>
This add the control flag for SVE ACLE to enable or disable
RTE_HAS_SVE_ACLE macro in the build.
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
Changes in v4:
- Resend patches. With v3, patches were not sent properly
in single series.
Changes in v3:
- Moved sve_acle condition to be consider for
RTE_HAS_SVE_ACLE flag only.
Changes in v2:
- Renamed the flag to sve_acle from sve
- Added double-indent.
config/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 8aead74086..6f8961eac8 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -605,7 +605,7 @@ endif
if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
- if (cc.check_header('arm_sve.h'))
+ if (cc.check_header('arm_sve.h') and soc_config.get('sve_acle', true))
dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)
endif
endif
--
2.25.1
next prev parent reply other threads:[~2022-05-09 10:19 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-05 14:27 [PATCH 1/2] config/arm: add SVE " Rahul Bhansali
2022-05-05 14:27 ` [PATCH 2/2] config/arm: disable SVE for cn10k Rahul Bhansali
2022-05-06 2:29 ` fengchengwen
2022-05-06 4:54 ` [EXT] " Rahul Bhansali
2022-05-06 6:36 ` fengchengwen
2022-05-06 7:23 ` Ruifeng Wang
2022-05-06 13:17 ` Rahul Bhansali
2022-05-07 0:52 ` fengchengwen
2022-05-05 14:39 ` [PATCH 1/2] config/arm: add SVE control flag Bruce Richardson
2022-05-06 14:16 ` [EXT] " Rahul Bhansali
2022-05-06 2:23 ` fengchengwen
2022-05-07 9:39 ` [PATCH v2 1/2] config/arm: add SVE ACLE " Rahul Bhansali
2022-05-07 9:39 ` [PATCH v2 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-05-09 0:49 ` [PATCH v2 1/2] config/arm: add SVE ACLE control flag fengchengwen
2022-05-09 9:46 ` [PATCH v3 " Rahul Bhansali
2022-05-09 9:46 ` [PATCH v3 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-05-09 10:19 ` Rahul Bhansali [this message]
2022-05-09 10:19 ` [PATCH v4 " Rahul Bhansali
2022-05-10 2:57 ` fengchengwen
2022-05-11 1:35 ` Ruifeng Wang
2022-05-11 4:12 ` Honnappa Nagarahalli
2022-05-10 2:57 ` [PATCH v4 1/2] config/arm: add SVE ACLE control flag fengchengwen
2022-05-11 1:35 ` Ruifeng Wang
2022-05-11 4:09 ` Honnappa Nagarahalli
2022-05-17 7:56 ` Juraj Linkeš
2022-05-18 9:18 ` Rahul Bhansali
2022-05-18 14:45 ` Juraj Linkeš
2022-05-19 13:28 ` [PATCH v5 " Rahul Bhansali
2022-05-19 13:28 ` [PATCH v5 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-06-01 22:38 ` Thomas Monjalon
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