From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DB1E3A0093; Tue, 10 May 2022 17:08:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AEDCC42858; Tue, 10 May 2022 17:08:20 +0200 (CEST) Received: from mail-lf1-f49.google.com (mail-lf1-f49.google.com [209.85.167.49]) by mails.dpdk.org (Postfix) with ESMTP id C660342848 for ; Tue, 10 May 2022 17:08:18 +0200 (CEST) Received: by mail-lf1-f49.google.com with SMTP id p26so16597425lfh.10 for ; Tue, 10 May 2022 08:08:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SiJJicmSCFrFlrS6bKskGVGKimGsuO7DGMjRiELgor4=; b=GWTucCPQZqd4/GTvPAG07hjQtiXsggfNyfw19JAGKlPi8DB9vwDb9jIpy4uLSrG5Yo zWzGmJ//Z/q0v409AZZ/1HgYAfVJln4h//v0nyWseobA0MANch/BBT3tW1LLZPe4olpI tLfVx5lexbVa+OPcfd9B/PviDsFm7Xab4fTsEELPkuO9SBLemueSSqbPfqdCrkPlpw7M PEoYNOd9PhE0mmJb83267DH/Dhb1n2CcVcb1JhgMtNphFT/631/Hwbow6cd/ssHOYTIo Pi8r5vkQKWPfbPnQNB3SlGlMy80vT51Ah4Xmxke/+RS7Q1jTVhZBGngcsWSQ+6hsle8S wxZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SiJJicmSCFrFlrS6bKskGVGKimGsuO7DGMjRiELgor4=; b=KjxhkthaU1J+cqYoTmLgobZ1WKTb9Xj2wK0AL72VT95/sGhYqNjG6Xhrlzxo8tutGW Rxxw4eELCVAzPj2afgjkPl73QnFDElCoeTXyme/7K8//ZcSy31pnIY4jBjcDKexiuWOm AMhgtoQc14fjnILpho3nlERUr0sB7TmUx8W5gbf3pQqUnQS7UMMGa55HS4MV0y1n/+ro 8zQzKazyntJ1mVulK3DPDa79mmeYdm6lPqv2zPy6AGlBHhb7UFlGbAP2F4fwKKstS+2k JUgdU4z7SwftSSwXPIH0oWkDT509cCtepCZirdiD+j1GMLHla9XYQtTDHfuT67bd9+Om 4qqw== X-Gm-Message-State: AOAM533uJNAtEudfQTZ4kg6h6RWBSzBGRBN8T90m2FcGZIeylsbxbXPo uMedlyWxbVRIF1uSSNO74ti+hQ== X-Google-Smtp-Source: ABdhPJwx1pDDZxdFynRT/zANJ6IsOKMECIsxyZlYDGNDHOtHgL6yaCaQ8BFnFK6YvCG9HfRz01NEXw== X-Received: by 2002:a05:6512:c22:b0:473:c64b:1cf5 with SMTP id z34-20020a0565120c2200b00473c64b1cf5mr16825729lfu.427.1652195297918; Tue, 10 May 2022 08:08:17 -0700 (PDT) Received: from toster.office.semihalf.net ([83.142.187.84]) by smtp.gmail.com with ESMTPSA id z4-20020a19e204000000b0047255d2117esm2311895lfg.173.2022.05.10.08.08.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 May 2022 08:08:17 -0700 (PDT) From: Stanislaw Kardach To: Haiyue Wang Cc: Stanislaw Kardach , dev@dpdk.org, Frank Zhao , Sam Grove , mw@semihalf.com, upstream@semihalf.com Subject: [PATCH v2 2/8] net/ixgbe: enable vector stubs for RISC-V Date: Tue, 10 May 2022 17:07:53 +0200 Message-Id: <20220510150759.525434-3-kda@semihalf.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220510150759.525434-1-kda@semihalf.com> References: <20220505173003.3242618-1-kda@semihalf.com> <20220510150759.525434-1-kda@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Re-use vector processing stubs in ixgbe PMD defined for PPC for RISC-V. This enables ixgbe PMD usage in scalar mode on this architecture. The ixgbe PMD driver was validated with Intel X520-DA2 NIC and the test-pmd application. Packet transfer checked using all UIO drivers available for non-IOMMU platforms: uio_pci_generic, vfio-pci noiommu and igb_uio. Sponsored-by: Frank Zhao Sponsored-by: Sam Grove Signed-off-by: Stanislaw Kardach --- doc/guides/nics/features/ixgbe.ini | 1 + drivers/net/ixgbe/ixgbe_rxtx.c | 4 ++-- drivers/net/ixgbe/meson.build | 6 ------ 3 files changed, 3 insertions(+), 8 deletions(-) diff --git a/doc/guides/nics/features/ixgbe.ini b/doc/guides/nics/features/ixgbe.ini index c5333d1142..b776ca1cf1 100644 --- a/doc/guides/nics/features/ixgbe.ini +++ b/doc/guides/nics/features/ixgbe.ini @@ -54,6 +54,7 @@ Windows = Y ARMv8 = Y x86-32 = Y x86-64 = Y +rv64 = Y [rte_flow items] eth = Y diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 9e8ea366a5..009d9b624a 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -5957,8 +5957,8 @@ ixgbe_config_rss_filter(struct rte_eth_dev *dev, return 0; } -/* Stubs needed for linkage when RTE_ARCH_PPC_64 is set */ -#if defined(RTE_ARCH_PPC_64) +/* Stubs needed for linkage when RTE_ARCH_PPC_64 or RTE_ARCH_RISCV is set */ +#if defined(RTE_ARCH_PPC_64) || defined(RTE_ARCH_RISCV) int ixgbe_rx_vec_dev_conf_condition_check(struct rte_eth_dev __rte_unused *dev) { diff --git a/drivers/net/ixgbe/meson.build b/drivers/net/ixgbe/meson.build index 88539e97d5..162f8d5f46 100644 --- a/drivers/net/ixgbe/meson.build +++ b/drivers/net/ixgbe/meson.build @@ -1,12 +1,6 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel Corporation -if arch_subdir == 'riscv' - build = false - reason = 'riscv arch not supported' - subdir_done() -endif - cflags += ['-DRTE_LIBRTE_IXGBE_BYPASS'] subdir('base') -- 2.30.2