From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DB20AA0093; Tue, 10 May 2022 17:09:00 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 77BBC42865; Tue, 10 May 2022 17:08:28 +0200 (CEST) Received: from mail-lj1-f178.google.com (mail-lj1-f178.google.com [209.85.208.178]) by mails.dpdk.org (Postfix) with ESMTP id 0062742852 for ; Tue, 10 May 2022 17:08:25 +0200 (CEST) Received: by mail-lj1-f178.google.com with SMTP id s27so21212208ljd.2 for ; Tue, 10 May 2022 08:08:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=il/Ojg6nMnnxJ4v/UzuQOsltnvdlSZEce3Ircx4SClE=; b=q08l3kRzNa0JkCvGtW9m2D7SY0CzTp7shd3JBOdFdVMdYwg1P0DZ8c51pPMJTGPJLo vcDfdflzCaMZlg+OuCZtz6B8ekuktkRbIX2+h/PYQSR1nw7qpOHxzjlK6ejn2u1oSZu/ /1lQvarmdgw+3aEKL5nLnseQEx7AI8qgNakbz75Q6UEgvQ7dr62UEtqrEL+tW/e+NafC /UIZZ+z139T382XcwBrI4SxoZ3eQZQyX5BzC15QgNYWQpjTxp4urimd7rXHqJMfmEVKG uYwNK3H07k2vooa7lrSTIhln6V/259Ecj32qpuqt6xM51LlhycXfyp9BLMFhu/FLQmTs NO5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=il/Ojg6nMnnxJ4v/UzuQOsltnvdlSZEce3Ircx4SClE=; b=uEuDIPPOkzltSBgTJ1SBZ2cXl0hn+tEzxGUlF54Pr7PD0iQ9Q7kNkjUneRJ5ZzdUmK OXVajon2PSLkjWBWE6VwKN8i8PU3lhpxWYsQ+o4Qf1qrBkTetLniLbVMYgSr4rTmxN8B ZCHuoHpQVvxy7SWZu7SzMVte7jUSSiK3MN1EEOrtiKFu/+Yi4Mh8U8OgVw0gDegxOmuD ag5mT0oYFr9y1XSvB1l33PggJYlEt8QWaTHpd4ytFU0DqOSpOYXYJ46vLM2IOG98h5cQ 2OV2UsVq0M3KF+g7YYNlGjZpXPHzyIE8f3Rk/EoqzDjQq+kjtTSy5FlYBQPBw/IDIJRJ kx1A== X-Gm-Message-State: AOAM533xiv2VlsvxRMdPiXwdRPFCUaX+XahWRvlIvX0klyiV6XWqbJgr RrPOmNssq5sjPztV3I+oc2quky1jY9okbg== X-Google-Smtp-Source: ABdhPJylfh4LKWM0PVbxOJ14qr/9pMf/jktLwYvkH5UAGFrAv6FpkydDOXYqcVi+JKMxfofHi+KbDw== X-Received: by 2002:a2e:a547:0:b0:250:5da5:e660 with SMTP id e7-20020a2ea547000000b002505da5e660mr14659544ljn.208.1652195305032; Tue, 10 May 2022 08:08:25 -0700 (PDT) Received: from toster.office.semihalf.net ([83.142.187.84]) by smtp.gmail.com with ESMTPSA id z4-20020a19e204000000b0047255d2117esm2311895lfg.173.2022.05.10.08.08.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 May 2022 08:08:24 -0700 (PDT) From: Stanislaw Kardach To: dev@dpdk.org Cc: Michal Mazurek , Frank Zhao , Sam Grove , mw@semihalf.com, upstream@semihalf.com, Stanislaw Kardach Subject: [PATCH v2 6/8] test/cpuflags: add test for RISC-V cpu flag Date: Tue, 10 May 2022 17:07:57 +0200 Message-Id: <20220510150759.525434-7-kda@semihalf.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220510150759.525434-1-kda@semihalf.com> References: <20220505173003.3242618-1-kda@semihalf.com> <20220510150759.525434-1-kda@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Michal Mazurek Add checks for all flag values defined in the RISC-V misa CSR register. Sponsored-by: Frank Zhao Sponsored-by: Sam Grove Signed-off-by: Michal Mazurek Signed-off-by: Stanislaw Kardach --- app/test/test_cpuflags.c | 81 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 40f6ac7fca..98a99c2c7d 100644 --- a/app/test/test_cpuflags.c +++ b/app/test/test_cpuflags.c @@ -200,6 +200,87 @@ test_cpuflags(void) CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC); #endif +#if defined(RTE_ARCH_RISCV) + + printf("Check for RISCV_ISA_A:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_A); + + printf("Check for RISCV_ISA_B:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_B); + + printf("Check for RISCV_ISA_C:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_C); + + printf("Check for RISCV_ISA_D:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_D); + + printf("Check for RISCV_ISA_E:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_E); + + printf("Check for RISCV_ISA_F:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_F); + + printf("Check for RISCV_ISA_G:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_G); + + printf("Check for RISCV_ISA_H:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_H); + + printf("Check for RISCV_ISA_I:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_I); + + printf("Check for RISCV_ISA_J:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_J); + + printf("Check for RISCV_ISA_K:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_K); + + printf("Check for RISCV_ISA_L:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_L); + + printf("Check for RISCV_ISA_M:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_M); + + printf("Check for RISCV_ISA_N:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_N); + + printf("Check for RISCV_ISA_O:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_O); + + printf("Check for RISCV_ISA_P:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_P); + + printf("Check for RISCV_ISA_Q:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_Q); + + printf("Check for RISCV_ISA_R:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_R); + + printf("Check for RISCV_ISA_S:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_S); + + printf("Check for RISCV_ISA_T:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_T); + + printf("Check for RISCV_ISA_U:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_U); + + printf("Check for RISCV_ISA_V:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_V); + + printf("Check for RISCV_ISA_W:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_W); + + printf("Check for RISCV_ISA_X:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_X); + + printf("Check for RISCV_ISA_Y:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_Y); + + printf("Check for RISCV_ISA_Z:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_RISCV_ISA_Z); +#endif + /* * Check if invalid data is handled properly */ -- 2.30.2