From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A489A0503; Thu, 19 May 2022 15:28:46 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0FDA842685; Thu, 19 May 2022 15:28:46 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5F3DE42684 for ; Thu, 19 May 2022 15:28:45 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24J7exYY015774; Thu, 19 May 2022 06:28:42 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pfpt0220; bh=hr+LBew3AyUFevJyMaWWR0I2gOHrpfhQxYedDFUVfdU=; b=MSBqUFRqp7iStIAwlhBua/JFaLArnVxFQ4w5XY0+boUKiyt3Bt8objG+YOXBDyGk5YaI XZOGqm08JlwOsRewbwQ4JVXflujcYL71IK8zYJxzxfj9w+2viC2c9cExXi1az7P4UYDS 7nJAfmdhWcmoIKH/gpEDZaxU2l/QCRKCjAFxKVk6FF8yVDVlDNaM/PmKaoDVxo6gSzNq ASU2D0VXj12Qr1qJTJfAFqyWzu3hMHu3CwHNZ65+PClRDCCfjUkyeP8UFGOg6bCRfNav jCH/bbTCy+PE2fPWpghs/49LwMisnwvCuNbUcIzme5PdZGr78uVNkWXQM6jk3ukd7VBt Mg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3g50as5aug-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 19 May 2022 06:28:41 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 19 May 2022 06:28:39 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 19 May 2022 06:28:39 -0700 Received: from localhost.localdomain (unknown [10.28.48.107]) by maili.marvell.com (Postfix) with ESMTP id 18B3B3F705D; Thu, 19 May 2022 06:28:36 -0700 (PDT) From: Rahul Bhansali To: , Jan Viktorin , Ruifeng Wang , Bruce Richardson CC: , Rahul Bhansali , "Chengwen Feng" , =?UTF-8?q?Juraj=20Linke=C5=A1?= Subject: [PATCH v5 1/2] config/arm: add SVE ACLE control flag Date: Thu, 19 May 2022 18:58:29 +0530 Message-ID: <20220519132830.3677023-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220505142744.1423344-1-rbhansali@marvell.com> References: <20220505142744.1423344-1-rbhansali@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset="y" Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: lD9BQb6F3_7Zy-AXCUAqA8TI1Wwh5yeG X-Proofpoint-GUID: lD9BQb6F3_7Zy-AXCUAqA8TI1Wwh5yeG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-19_03,2022-05-19_03,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org An additional check of control flag sve_acle for RTE_HAS_SVE_ACLE macro to be part of the build. If any SoC config doesn't have sve_acle flag parameter then default it will be considered as true. Signed-off-by: Rahul Bhansali Reviewed-by: Chengwen Feng Reviewed-by: Juraj Linkeš Acked-by: Ruifeng Wang --- Changes in v5: Updated commit message Changes in v4: - Resend patches. With v3, patches were not sent properly in single series. Changes in v3: - Moved sve_acle condition to be consider for RTE_HAS_SVE_ACLE flag only. Changes in v2: - Renamed the flag to sve_acle from sve - Added double-indent. config/arm/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 8aead74086..6f8961eac8 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -605,7 +605,7 @@ endif if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' compile_time_cpuflags += ['RTE_CPUFLAG_SVE'] - if (cc.check_header('arm_sve.h')) + if (cc.check_header('arm_sve.h') and soc_config.get('sve_acle', true)) dpdk_conf.set('RTE_HAS_SVE_ACLE', 1) endif endif -- 2.25.1