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From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Ruifeng Wang <ruifeng.wang@arm.com>, Jan Viktorin
<viktorin@rehivetech.com>, Bruce Richardson <bruce.richardson@intel.com>
CC: <jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>, "Chengwen
Feng" <fengchengwen@huawei.com>
Subject: [PATCH v5 2/2] config/arm: disable SVE ACLE for cn10k
Date: Thu, 19 May 2022 18:58:30 +0530
Message-ID: <20220519132830.3677023-2-rbhansali@marvell.com>
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This disable the sve_acle flag for cn10k.
For native build, -Dplatform=cn10k will require to
get sve_acle flag parameter in the build.
Performance impact:-
With l3fwd example, lpm lookup performance increased
by ~21% if Neon is used instead of SVE. Hence, disabled
sve_acle flag for cn10k.
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
Changes in v5: Updated commit message.
Changes in v4:
- Resend patches. With v3, patches were not sent properly
in single series.
Changes in v3: No change
Changes in v2:
- Renamed the flag to sve_acle from sve
config/arm/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 6f8961eac8..a94129168f 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -281,7 +281,8 @@ soc_cn10k = {
],
'part_number': '0xd49',
'extra_march_features': ['crypto'],
- 'numa': false
+ 'numa': false,
+ 'sve_acle': false
}
soc_dpaa = {
--
2.25.1