From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E368A0503; Fri, 20 May 2022 04:47:05 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0B244427F0; Fri, 20 May 2022 04:47:05 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id BB62B427EB; Fri, 20 May 2022 04:47:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653014823; x=1684550823; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VliCtTAZwEcrdskEvnCggM5MM2M2vsJgI76rGN+bpk4=; b=lsRhzrooolIMuhLI8zOYJox+UpVJsLCAMIWgRWhKtVjqtkQLM5mdzs69 GSSzrEFFS/il21JePMhVIpWHvNvsc4voxPtkf+4dlbZkELv0uT5HtWPBh YTfe47quKt4Ru3RUGbr97yNxAJusmRCQWQ+BOZgkmRb7i1VZSjP8juYrf lUrwcB7Lcwwe0A0UlJk8eqUDuydKwooxiz2OKtA4676q+VGyZrv5ns0mA 9R+GQtydJ/MduzDP+LgaxyFc9TqCTx1Y3RjdHpcXWi/8JuAUAmD2KQQFo se507zMuyLy8WfyvXuX9QdIlDwvctd4f3xPTS9phEeSSUHqiaCy93kJ4+ A==; X-IronPort-AV: E=McAfee;i="6400,9594,10352"; a="272589615" X-IronPort-AV: E=Sophos;i="5.91,238,1647327600"; d="scan'208";a="272589615" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 19:47:01 -0700 X-IronPort-AV: E=Sophos;i="5.91,238,1647327600"; d="scan'208";a="743269062" Received: from unknown (HELO localhost.localdomain) ([10.239.251.104]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 19:46:59 -0700 From: Ke Zhang To: xiaoyun.li@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com, dev@dpdk.org Cc: Ke Zhang , stable@dpdk.org Subject: [PATCH v2 1/1] net/iavf: fix Rx queue interrupt setting Date: Fri, 20 May 2022 02:39:36 +0000 Message-Id: <20220520023936.259286-2-ke1x.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220520023936.259286-1-ke1x.zhang@intel.com> References: <20220425083628.81133-1-ke1x.zhang@intel.com> <20220520023936.259286-1-ke1x.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org For Rx-Queue Interrupt Setting, when vf rx interrupt disable(INTENA=0), there are two ways to write back descriptor to host memory: 1)Set WB_ON_ITR bit 0 to Interrupt Dynamic Control Register: Completed descriptors are posted to host memory according to the internal descriptor cache policy (in other words when a full cache line is available for write-back). A internal descriptor size is 16 bytes or 32 bytes, a cache line size is 64 bytes or 128 bytes from datasheet : PCIe Global Config 2 - GLPCI_CNF2 (0x000BE004; RO) so the full cache line could contains 4 packets, it means Network card will send 4 packets to host when a full cache line is available. 2)Set WB_ON_ITR bit 1 to Interrupt Dynamic Control Register: Completed descriptors also trigger the ITR. Following ITR expiration, all leftover completed descriptors are posted to host memory. Network card will send packet to host even if only one descriptor is completed. Changing 1) to 2) to make sure VF send the packet to host even if there is only one rx packet is ready in hardware. Fixes: d6bde6b5eae9 ("net/avf: enable Rx interrupt") Cc: stable@dpdk.org Signed-off-by: Ke Zhang --- drivers/net/iavf/iavf_ethdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index d6190ac24a..17c7720600 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -1833,7 +1833,7 @@ iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), - 0); + IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK); IAVF_WRITE_FLUSH(hw); return 0; -- 2.25.1