From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 285FFA04FF; Tue, 24 May 2022 10:43:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61B2742B6C; Tue, 24 May 2022 10:43:09 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id D8C5E42B6C for ; Tue, 24 May 2022 10:43:07 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24NNBPA1022543 for ; Tue, 24 May 2022 01:43:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=iN1sCQZHGDI2aZjqTNq8Gqm2exjpbR/OEf72WG+8Gj0=; b=k9fvtbOqKe69Fq6R4mgGjeOvy4jHOnOfRW9WPfUzPIo7ShvcTX7gw5AgcIIbLeDCJ5Ea OEdpNPxMtZdbDcH8Nz8oYcxvLBx/+0vbqfb6xkLVrjCp3jcHG5VlbCDgn3FXYUs9yEJg iVU5tDMTn8tYbaKWcm7zh2vhva2pb48WOvqPp4RkBT2Fi+DCSEPwUV86HqpjSw24LDUY qdCUGW/lkBoDvVXCAfz2DJF7EkWbwZP3DcMzN4RULZLr4vLjzEbbilXne9Ed6Hn771cJ bmhuGIURY4f7dBB6ZWntUgjrLH5Iwlyli92+rveLusaezry92RAyBnYtBM/Fp8d3idSE Hw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3g8kqjhruh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 24 May 2022 01:43:06 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 24 May 2022 01:43:05 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 24 May 2022 01:43:05 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id C8E363F70A1; Tue, 24 May 2022 01:43:03 -0700 (PDT) From: Harman Kalra To: , Jerin Jacob , Maciej Czekaj CC: Hanumanth Pothula Subject: [PATCH v3 06/11] net/thunderx: reset Rx DMAC control register Date: Tue, 24 May 2022 14:12:30 +0530 Message-ID: <20220524084235.17796-6-hkalra@marvell.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220524084235.17796-1-hkalra@marvell.com> References: <20220517173941.189330-2-hkalra@marvell.com> <20220524084235.17796-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: teEtD9Hih4glaC24SzM5uNYmTuGjGyV6 X-Proofpoint-GUID: teEtD9Hih4glaC24SzM5uNYmTuGjGyV6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-24_06,2022-05-23_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Hanumanth Pothula During initialization, reset RX DMAC control register by sending mbox message NIC_MBOX_MSG_RESET_XCAST to PF. Signed-off-by: Hanumanth Pothula --- drivers/net/thunderx/base/nicvf_mbox.c | 9 +++++++++ drivers/net/thunderx/base/nicvf_mbox.h | 2 ++ drivers/net/thunderx/nicvf_ethdev.c | 3 +++ 3 files changed, 14 insertions(+) diff --git a/drivers/net/thunderx/base/nicvf_mbox.c b/drivers/net/thunderx/base/nicvf_mbox.c index 281027ccce..275e593286 100644 --- a/drivers/net/thunderx/base/nicvf_mbox.c +++ b/drivers/net/thunderx/base/nicvf_mbox.c @@ -449,3 +449,12 @@ nicvf_mbox_link_change(struct nicvf *nic) mbx.msg.msg = NIC_MBOX_MSG_BGX_LINK_CHANGE; nicvf_mbox_send_async_msg_to_pf(nic, &mbx); } + +void +nicvf_mbox_reset_xcast(struct nicvf *nic) +{ + struct nic_mbx mbx = { .msg = { 0 } }; + + mbx.msg.msg = NIC_MBOX_MSG_RESET_XCAST; + nicvf_mbox_send_msg_to_pf(nic, &mbx); +} diff --git a/drivers/net/thunderx/base/nicvf_mbox.h b/drivers/net/thunderx/base/nicvf_mbox.h index 490bed206b..044220a2cd 100644 --- a/drivers/net/thunderx/base/nicvf_mbox.h +++ b/drivers/net/thunderx/base/nicvf_mbox.h @@ -43,6 +43,7 @@ #define NIC_MBOX_MSG_SET_LINK 0x21 /* Set link up/down */ #define NIC_MBOX_MSG_CFG_DONE 0xF0 /* VF configuration done */ #define NIC_MBOX_MSG_SHUTDOWN 0xF1 /* VF is being shutdown */ +#define NIC_MBOX_MSG_RESET_XCAST 0xF2 /* Reset DCAM filtering mode */ #define NIC_MBOX_MSG_MAX 0x100 /* Maximum number of messages */ /* Get vNIC VF configuration */ @@ -223,5 +224,6 @@ int nicvf_mbox_set_link_up_down(struct nicvf *nic, bool enable); void nicvf_mbox_shutdown(struct nicvf *nic); void nicvf_mbox_cfg_done(struct nicvf *nic); void nicvf_mbox_link_change(struct nicvf *nic); +void nicvf_mbox_reset_xcast(struct nicvf *nic); #endif /* __THUNDERX_NICVF_MBOX__ */ diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c index addbd53735..1e268d9b0f 100644 --- a/drivers/net/thunderx/nicvf_ethdev.c +++ b/drivers/net/thunderx/nicvf_ethdev.c @@ -2196,6 +2196,9 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev) ); } + /* To make sure RX DMAC register is set to default value (0x3) */ + nicvf_mbox_reset_xcast(nic); + ret = nicvf_base_init(nic); if (ret) { PMD_INIT_LOG(ERR, "Failed to execute nicvf_base_init"); -- 2.18.0