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From: Stanislaw Kardach <kda@semihalf.com>
To: Bruce Richardson <bruce.richardson@intel.com>
Cc: Stanislaw Kardach <kda@semihalf.com>,
	dev@dpdk.org, Frank Zhao <Frank.Zhao@starfivetech.com>,
	Sam Grove <sam.grove@sifive.com>,
	mw@semihalf.com, upstream@semihalf.com
Subject: [PATCH RESEND v4 7/8] devtools: add RISC-V to test-meson-builds.sh
Date: Tue,  7 Jun 2022 12:46:16 +0200	[thread overview]
Message-ID: <20220607104617.153892-8-kda@semihalf.com> (raw)
In-Reply-To: <20220607104617.153892-1-kda@semihalf.com>

Validate RISC-V compilation when test-meson-builds.sh is called. The
check will be only performed if appropriate toolchain is present on the
system (same as with other architectures).

Sponsored-by: Frank Zhao <Frank.Zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
---
 devtools/test-meson-builds.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
index a653b253cb..f732dccf6c 100755
--- a/devtools/test-meson-builds.sh
+++ b/devtools/test-meson-builds.sh
@@ -275,6 +275,10 @@ for f in $srcdir/config/ppc/ppc* ; do
 	build $targetdir $f ABI $use_shared
 done
 
+# RISC-V configuration
+build build-riscv64-linux-gcc $srcdir/config/riscv/riscv64_linux_gcc ABI \
+	$use_shared
+
 # Test installation of the x86-generic target, to be used for checking
 # the sample apps build using the pkg-config file for cflags and libs
 load_env cc
-- 
2.30.2


  parent reply	other threads:[~2022-06-07 10:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-07 10:46 [PATCH RESEND v4 0/8] Introduce support for RISC-V architecture Stanislaw Kardach
2022-06-07 10:46 ` [PATCH RESEND v4 1/8] eal: add initial " Stanislaw Kardach
2022-06-07 10:46 ` [PATCH RESEND v4 2/8] net/ixgbe: enable vector stubs for RISC-V Stanislaw Kardach
2022-06-07 10:46 ` [PATCH RESEND v4 3/8] net/memif: set memfd syscall ID on RISC-V Stanislaw Kardach
2022-06-07 10:46 ` [PATCH RESEND v4 4/8] net/tap: set BPF syscall ID for RISC-V Stanislaw Kardach
2022-06-07 10:46 ` [PATCH RESEND v4 5/8] examples/l3fwd: enable RISC-V operation Stanislaw Kardach
2022-06-07 10:46 ` [PATCH RESEND v4 6/8] test/cpuflags: add test for RISC-V cpu flag Stanislaw Kardach
2022-06-07 10:46 ` Stanislaw Kardach [this message]
2022-06-07 10:46 ` [PATCH RESEND v4 8/8] ci: add RISCV64 cross compilation job Stanislaw Kardach

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