From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0085DA054D; Tue, 7 Jun 2022 18:44:26 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3194042802; Tue, 7 Jun 2022 18:44:14 +0200 (CEST) Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) by mails.dpdk.org (Postfix) with ESMTP id 84D15427EC for ; Tue, 7 Jun 2022 18:44:12 +0200 (CEST) Received: by mail-ej1-f45.google.com with SMTP id fu3so34882348ejc.7 for ; Tue, 07 Jun 2022 09:44:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aQBGzTN6eJsPIWzjCn+wWuTaRf3XZAi9z/FM4jSoiEU=; b=UU3Qu1kMISWf8lYxDPi+7fADpnAFa7y949OTHldl49sysJiR4buCQMmRH5OggCd0pB 4IpJlAeMIILYAOwfbKy1QGE+1UCtBjJotLtKSqj9NiSqDo4S0FSWvbgC5c8lTwH8zsa1 jWoDRodqSRYbQormY03z6VB57drFBp6hRcfuocE9A5j8kN2fqzGhSX6wVotR6fOMlJdB Wb1PoihghFHREF1cvUFiWT932qxMILgUgVLZBmeuEhH2Y246F061AixAn/keqyWRvLid nQT+3RADX2dqp+yNo5/YJy+KBsSFk8D+tTQHgJOSSsevGTUe/Eiq3MX8lA22WohEENr7 JtLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aQBGzTN6eJsPIWzjCn+wWuTaRf3XZAi9z/FM4jSoiEU=; b=yfLoOQVNBwy0Zx3+gIPpp+NOF6x2HhqAWtd0Wpte4zBC9njXcIqEeZFZkaWF37BeuN za0GDxbKo0UxSlhboZP1QXQUuM1a+5v8GBp2fWdc7VY8i0sf+70dzRJEklWtcXYzOQKf CV6laKXtexrDt7VmCyz+N70X8rBo7BsnLHwM8y5zfUokCKG/NWjDGEXIIbZCvqOQJCVN MwIbTEDNc+9cr5Z1RJY93yqmFPB9RI7F1TCsxAf2A/o+pnejbzPKkUfibvDwIGe0xlaB XMVFGb5dnKgK3H6sirrqVCE707zJYf+PE2pguoqSYyFmQgV6VXFeNT6WOi7UsCZdchPl +u5A== X-Gm-Message-State: AOAM530YctjLFMb7XryiweCmQH4iHxuGiOE4xjg0zqp32qnItN0P/15e MFMLlQJKUaCF+Wxda+z5vEKZIQ== X-Google-Smtp-Source: ABdhPJzlgZ/mRAS4qfLlv4njnvaUIs/8tyf/SfGZi/PTqZ4srP09uVBACLY/YYWHnRyPIPcHsRzUQw== X-Received: by 2002:a17:906:6a28:b0:711:d032:caa4 with SMTP id qw40-20020a1709066a2800b00711d032caa4mr10375661ejc.80.1654620252167; Tue, 07 Jun 2022 09:44:12 -0700 (PDT) Received: from DESKTOP-U5LNN3J.localdomain ([83.142.187.86]) by smtp.gmail.com with ESMTPSA id m3-20020aa7c483000000b0042de29d8fc0sm10625901edq.94.2022.06.07.09.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jun 2022 09:44:11 -0700 (PDT) From: Michal Krawczyk To: ferruh.yigit@intel.com Cc: shaibran@amazon.com, upstream@semihalf.com, mw@semihalf.com, dev@dpdk.org, Michal Krawczyk , Dawid Gorecki , Amit Bernstein Subject: [PATCH 3/4] net/ena: add an option to disable LLQ Date: Tue, 7 Jun 2022 18:43:40 +0200 Message-Id: <20220607164341.19088-4-mk@semihalf.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220607164341.19088-1-mk@semihalf.com> References: <20220607164341.19088-1-mk@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The PMD attempts to enable the LLQ (Low Latency Queue) whenever it's possible. The LLQ requires the user to enable the Write Combining for the supported igb_uio/vfio-pci modules. The vfio-pci module officially doesn't support the WC. Moreover, in some Linux distributions, it can be built into the kernel, so any modifications to the vfio-pci module require a full rebuild of the kernel. This can make the configuration process much harder and for some users, that are not interested in the great network performance for their setups, it may be redundant. These users requested to be able to turn off LLQ to avoid the hassle of such a setup. It's generally not recommended to disable the LLQ, as it won't result in the performance improvement and on the 6th generation AWS instances the lack of LLQ can have a huge negative impact on hardware performance. The device argument which controls the LLQ is called 'enable_llq` and by default, it's set to 1 (which means that the LLQ is enabled). Setting it to 0 disables the LLQ. This commit also adds the explicit initialization of the devarg for the 'use_large_llq_hdr'. The PMD_REGISTER_PARAM_STRING() call for the ENA was updated with all the available devargs (including ENA_DEVARG_MISS_TXC_TO, which wasn't added previously). Signed-off-by: Michal Krawczyk Reviewed-by: Dawid Gorecki Reviewed-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/nics/ena.rst | 9 ++++++++ doc/guides/rel_notes/release_22_07.rst | 2 ++ drivers/net/ena/ena_ethdev.c | 29 +++++++++++++++++++++++++- drivers/net/ena/ena_ethdev.h | 1 + 4 files changed, 40 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/ena.rst b/doc/guides/nics/ena.rst index 3d780acac9..df5343e4ae 100644 --- a/doc/guides/nics/ena.rst +++ b/doc/guides/nics/ena.rst @@ -96,6 +96,15 @@ Configuration information timer service. Setting this parameter to 0 disables this feature. Maximum allowed value is 60 seconds. + * **enable_llq** (default 1) + + Determines whenever the driver should use the LLQ (if it's available) or + not. + + **NOTE: On the 6th generation AWS instances disabling LLQ may lead to a + huge performance degradation. In general disabling LLQ is highly not + recommended!** + **ENA Configuration Parameters** * **Number of Queues** diff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst index 73f566e5fc..45d0012f2d 100644 --- a/doc/guides/rel_notes/release_22_07.rst +++ b/doc/guides/rel_notes/release_22_07.rst @@ -93,6 +93,8 @@ New Features The new driver version (v2.7.0) includes: * Added fast mbuf free feature support. + * Added ``enable_llq`` device argument for controlling the PMD LLQ + (Low Latency Queue) mode. * **Updated Intel iavf driver.** diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index efd6dea4c2..d748b33e51 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -72,6 +72,12 @@ struct ena_stats { * considered as a missing. */ #define ENA_DEVARG_MISS_TXC_TO "miss_txc_to" +/* + * Controls whether LLQ should be used (if available). Enabled by default. + * NOTE: It's highly not recommended to disable the LLQ, as it may lead to a + * huge performance degradation on 6th generation AWS instances. + */ +#define ENA_DEVARG_ENABLE_LLQ "enable_llq" /* * Each rte_memzone should have unique name. @@ -1932,6 +1938,14 @@ ena_set_queues_placement_policy(struct ena_adapter *adapter, int rc; u32 llq_feature_mask; + if (!adapter->enable_llq) { + PMD_DRV_LOG(WARNING, + "NOTE: LLQ has been disabled as per user's request. " + "This may lead to a huge performance degradation!\n"); + ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; + return 0; + } + llq_feature_mask = 1 << ENA_ADMIN_LLQ; if (!(ena_dev->supported_features & llq_feature_mask)) { PMD_DRV_LOG(INFO, @@ -2127,7 +2141,10 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapter->id_number); + /* Assign default devargs values */ adapter->missing_tx_completion_to = ENA_TX_TIMEOUT; + adapter->enable_llq = true; + adapter->use_large_llq_hdr = false; rc = ena_parse_devargs(adapter, pci_dev->device.devargs); if (rc != 0) { @@ -3478,6 +3495,8 @@ static int ena_process_bool_devarg(const char *key, /* Now, assign it to the proper adapter field. */ if (strcmp(key, ENA_DEVARG_LARGE_LLQ_HDR) == 0) adapter->use_large_llq_hdr = bool_value; + else if (strcmp(key, ENA_DEVARG_ENABLE_LLQ) == 0) + adapter->enable_llq = bool_value; return 0; } @@ -3488,6 +3507,7 @@ static int ena_parse_devargs(struct ena_adapter *adapter, static const char * const allowed_args[] = { ENA_DEVARG_LARGE_LLQ_HDR, ENA_DEVARG_MISS_TXC_TO, + ENA_DEVARG_ENABLE_LLQ, NULL, }; struct rte_kvargs *kvlist; @@ -3509,6 +3529,10 @@ static int ena_parse_devargs(struct ena_adapter *adapter, goto exit; rc = rte_kvargs_process(kvlist, ENA_DEVARG_MISS_TXC_TO, ena_process_uint_devarg, adapter); + if (rc != 0) + goto exit; + rc = rte_kvargs_process(kvlist, ENA_DEVARG_ENABLE_LLQ, + ena_process_bool_devarg, adapter); exit: rte_kvargs_free(kvlist); @@ -3727,7 +3751,10 @@ static struct rte_pci_driver rte_ena_pmd = { RTE_PMD_REGISTER_PCI(net_ena, rte_ena_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_ena, pci_id_ena_map); RTE_PMD_REGISTER_KMOD_DEP(net_ena, "* igb_uio | uio_pci_generic | vfio-pci"); -RTE_PMD_REGISTER_PARAM_STRING(net_ena, ENA_DEVARG_LARGE_LLQ_HDR "=<0|1>"); +RTE_PMD_REGISTER_PARAM_STRING(net_ena, + ENA_DEVARG_LARGE_LLQ_HDR "=<0|1> " + ENA_DEVARG_ENABLE_LLQ "=<0|1> " + ENA_DEVARG_MISS_TXC_TO "="); RTE_LOG_REGISTER_SUFFIX(ena_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(ena_logtype_driver, driver, NOTICE); #ifdef RTE_ETHDEV_DEBUG_RX diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h index c0094b03ee..0db0918b43 100644 --- a/drivers/net/ena/ena_ethdev.h +++ b/drivers/net/ena/ena_ethdev.h @@ -303,6 +303,7 @@ struct ena_adapter { bool trigger_reset; + bool enable_llq; bool use_large_llq_hdr; uint32_t last_tx_comp_qid; -- 2.25.1