From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Radu Nicolau <radu.nicolau@intel.com>, Akhil Goyal <gakhil@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
<konstantin.ananyev@intel.com>
Subject: [PATCH 1/2] examples/ipsec-secgw: use Tx cksum offload conditionally
Date: Thu, 21 Jul 2022 21:01:31 +0530 [thread overview]
Message-ID: <20220721153132.3570-1-ndabilpuram@marvell.com> (raw)
Use Tx checksum offload only when all the ports have it enabled as
the qconf for a particular lcore stores ipv4_offloads for all the
Tx ports and each lcore can Tx to any port.
Fixes: 03128be4cd4d ("examples/ipsec-secgw: allow disabling some Rx/Tx offloads")
Cc: konstantin.ananyev@intel.com
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
examples/ipsec-secgw/ipsec-secgw.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
index 815b925..8a25b83 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -1998,12 +1998,6 @@ port_init(uint16_t portid, uint64_t req_rx_offloads, uint64_t req_tx_offloads)
qconf = &lcore_conf[lcore_id];
qconf->tx_queue_id[portid] = tx_queueid;
- /* Pre-populate pkt offloads based on capabilities */
- qconf->outbound.ipv4_offloads = RTE_MBUF_F_TX_IPV4;
- qconf->outbound.ipv6_offloads = RTE_MBUF_F_TX_IPV6;
- if (local_port_conf.txmode.offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
- qconf->outbound.ipv4_offloads |= RTE_MBUF_F_TX_IP_CKSUM;
-
tx_queueid++;
/* init RX queues */
@@ -2925,6 +2919,7 @@ main(int32_t argc, char **argv)
uint64_t req_rx_offloads[RTE_MAX_ETHPORTS];
uint64_t req_tx_offloads[RTE_MAX_ETHPORTS];
struct eh_conf *eh_conf = NULL;
+ uint32_t ipv4_cksum_port_mask = 0;
size_t sess_sz;
nb_bufs_in_pool = 0;
@@ -3046,6 +3041,20 @@ main(int32_t argc, char **argv)
&req_tx_offloads[portid]);
port_init(portid, req_rx_offloads[portid],
req_tx_offloads[portid]);
+ if ((req_tx_offloads[portid] & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM))
+ ipv4_cksum_port_mask = 1U << portid;
+ }
+
+ for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
+ if (rte_lcore_is_enabled(lcore_id) == 0)
+ continue;
+
+ /* Pre-populate pkt offloads based on capabilities */
+ lcore_conf[lcore_id].outbound.ipv4_offloads = RTE_MBUF_F_TX_IPV4;
+ lcore_conf[lcore_id].outbound.ipv6_offloads = RTE_MBUF_F_TX_IPV6;
+ /* Update per lcore checksum offload support only if all ports support it */
+ if (ipv4_cksum_port_mask == enabled_port_mask)
+ lcore_conf[lcore_id].outbound.ipv4_offloads |= RTE_MBUF_F_TX_IP_CKSUM;
}
/*
--
2.8.4
next reply other threads:[~2022-07-21 15:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-21 15:31 Nithin Dabilpuram [this message]
2022-07-21 15:31 ` [PATCH 2/2] examples/ipsec-secgw: fix issue with IP hdr manipulation Nithin Dabilpuram
2022-08-25 8:13 ` Akhil Goyal
2022-08-25 8:11 ` [PATCH 1/2] examples/ipsec-secgw: use Tx cksum offload conditionally Akhil Goyal
2022-08-28 8:52 ` Akhil Goyal
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